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M58LT256JST 参数 Datasheet PDF下载

M58LT256JST图片预览
型号: M58LT256JST
PDF下载: 下载PDF文件 查看货源
内容描述: 256兆位( Mb的16 】 16 ,多银行,多层次,突发) 1.8 V电源供电,安全闪存 [256 Mbit (16 Mb 】 16, multiple bank, multilevel, burst) 1.8 V supply, secure Flash memories]
分类和应用: 闪存
文件页数/大小: 108 页 / 1965 K
品牌: NUMONYX [ NUMONYX B.V ]
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M58LT256JST, M58LT256JSB  
Command interface  
4.10  
Buffer Enhanced Factory Program command  
The Buffer Enhanced Factory Program command has been specially developed to speed up  
programming in manufacturing environments where the programming time is critical.  
It is used to program one or more write buffer(s) of 32 words to a block. Once the device  
enters Buffer Enhanced Factory Program mode, the write buffer can be reloaded any  
number of times as long as the address remains within the same block. Only one block can  
be programmed at a time.  
If the block being programmed is protected, then the program operation aborts, the data in  
the block is not changed, and the Status Register outputs the error.  
The use of the Buffer Enhanced Factory Program command requires the following operating  
conditions:  
V
V
must be set to V  
PPH  
PP  
DD  
must be within operating range  
Ambient temperature T must be 30 °C 10 °C  
A
The targeted block must be unprotected  
The start address must be aligned with the start of a 32-word buffer boundary  
The address must remain the start address throughout programming.  
Dual operations are not supported during the Buffer Enhanced Factory Program operation  
and the command cannot be suspended.  
The Buffer Enhanced Factory Program command consists of three phases: the setup  
phase, the program and verify phase, and the exit phase. Please refer to Table 6: Factory  
commands for detailed information.  
4.10.1  
Setup phase  
The Buffer Enhanced Factory Program command requires two bus write cycles to initiate the  
command.  
The first bus write cycle sets up the Buffer Enhanced Factory Program command.  
The second bus write cycle confirms the command.  
After the confirm command is issued, read operations output the contents of the Status  
Register. The read Status Register command must not be issued or it is interpreted as data  
to program.  
The Status Register P/EC Bit SR7 should be read to check that the P/EC is ready to  
proceed to the next phase.  
If an error is detected, SR4 goes high (set to ‘1’) and the Buffer Enhanced Factory Program  
operation is terminated. See Section 5: Status Register for details on the error.  
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