Operating features
M25PX64
When Chip Select (S) is High, the device is deselected, but could remain in the active power
mode until all internal cycles have completed (program, erase, write status register). The
device then goes in to the standby power mode. The device consumption drops to ICC1
.
The deep power-down mode is entered when the specific instruction (the deep power-down
(DP) instruction) is executed. The device consumption drops further to ICC2. The device
remains in this mode until another specific instruction (the release from deep power-down
(RDP) instruction) is executed.
While in the deep power-down mode, the device ignores all write, program and erase
instructions (see Section 6.18: Deep power-down (DP)), this can be used as an extra
software protection mechanism, when the device is not in active use, to protect the device
from inadvertent write, program or erase instructions.
4.6
Status register
The status register contains a number of status and control bits that can be read or set (as
appropriate) by specific instructions. See Section 6.4: Read status register (RDSR) for a
detailed description of the status register bits.
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