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M25PE80-VMN6P 参数 Datasheet PDF下载

M25PE80-VMN6P图片预览
型号: M25PE80-VMN6P
PDF下载: 下载PDF文件 查看货源
内容描述: 8兆位,页擦除串行闪存与字节变性, 75兆赫的SPI总线,标准引脚 [8-Mbit, page-erasable serial flash memory with byte alterability, 75 MHz SPI bus, standard pinout]
分类和应用: 闪存内存集成电路
文件页数/大小: 66 页 / 1387 K
品牌: NUMONYX [ NUMONYX B.V ]
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M25PE80  
DC and AC parameters  
Table 25. Reset conditions  
Test conditions specified in Table 17 and Table 18  
Symbol  
Alt.  
Parameter  
Conditions  
Min Typ Max Unit  
(1)  
tRLRH  
tRST Reset pulse width  
10  
µs  
ns  
Chip should have been  
Chip Select High to  
Reset High  
tSHRH  
deselected before reset is de- 10  
asserted  
1. Value guaranteed by characterization, not 100% tested in production.  
(1)(2)  
Table 26. Timings after a Reset Low pulse  
Test conditions specified in Table 17 and Table 18  
Symb  
ol  
Conditions:  
Reset pulse occurred  
Alt. Parameter  
Max  
Unit  
While decoding an instruction(3): WREN, WRDI,  
RDID, RDSR, READ, RDLR, Fast_Read, WRLR,  
PW, PP, PE, SE, BE, SSE, DP, RDP  
30  
µs  
Under completion of an erase or program cycle of  
a PW, PP, PE, SE, BE operation  
300  
3
µs  
Reset  
tRHSL tREC recovery  
time  
Under completion of an erase cycle of an SSE  
operation  
ms  
tW (see  
Table 23  
and  
Under completion of a WRSR operation  
ms  
µs  
Table 24)  
Device deselected (S High) and in standby mode  
0
1. All the values are guaranteed by characterization, and not 100% tested in production.  
2. See Table 15 for a description of the device status after a Reset Low pulse.  
3. S remains Low while Reset is Low.  
Figure 29. Reset AC waveforms  
S
tSHRH  
tRHSL  
tRLRH  
Reset  
AI06808  
57/66  
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