欢迎访问ic37.com |
会员登录 免费注册
发布采购

M25PE80-VMN6P 参数 Datasheet PDF下载

M25PE80-VMN6P图片预览
型号: M25PE80-VMN6P
PDF下载: 下载PDF文件 查看货源
内容描述: 8兆位,页擦除串行闪存与字节变性, 75兆赫的SPI总线,标准引脚 [8-Mbit, page-erasable serial flash memory with byte alterability, 75 MHz SPI bus, standard pinout]
分类和应用: 闪存内存集成电路
文件页数/大小: 66 页 / 1387 K
品牌: NUMONYX [ NUMONYX B.V ]
 浏览型号M25PE80-VMN6P的Datasheet PDF文件第18页浏览型号M25PE80-VMN6P的Datasheet PDF文件第19页浏览型号M25PE80-VMN6P的Datasheet PDF文件第20页浏览型号M25PE80-VMN6P的Datasheet PDF文件第21页浏览型号M25PE80-VMN6P的Datasheet PDF文件第23页浏览型号M25PE80-VMN6P的Datasheet PDF文件第24页浏览型号M25PE80-VMN6P的Datasheet PDF文件第25页浏览型号M25PE80-VMN6P的Datasheet PDF文件第26页  
Instructions  
M25PE80  
Figure 7.  
Write enable (WREN) instruction sequence  
S
0
1
2
3
4
5
6
7
C
D
Q
Instruction  
High Impedance  
AI02281E  
6.2  
Write disable (WRDI)  
The write disable (WRDI) instruction (Figure 8) resets the write enable latch (WEL) bit.  
The write disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the  
instruction code, and then driving Chip Select (S) High.  
The write enable latch (WEL) bit is reset under the following conditions:  
Power-up  
Write disable (WRDI) instruction completion  
Page write (PW) instruction completion  
Page program (PP) instruction completion  
Write to lock register (WRLR) instruction completion  
Page erase (PE) instruction completion  
Sector erase (SE) instruction completion  
Bulk erase (BE) instruction completion.  
Figure 8.  
Write disable (WRDI) instruction sequence  
S
0
1
2
3
4
5
6
7
C
D
Q
Instruction  
High Impedance  
AI03750D  
22/66  
 复制成功!