M25P32
Figure 1.
Logic diagram
VCC
Description
D
C
S
W/V
PP
HOLD
M25P32
Q
VSS
AI07483b
Table 1.
Signal names
Function
Serial Clock
Serial Data input
Serial Data output
Chip Select
Write Protect/Enhanced Program supply voltage
Hold
Supply voltage
Ground
Input
Input
Output
Input
Input
Input
Input
Direction
Signal name
C
D
Q
S
W/V
PP
HOLD
V
CC
V
SS
Figure 2.
VDFPN connections
M25P32
S
Q
W/V
PP
VSS
1
2
3
4
8
7
6
5
VCC
HOLD
C
D
AI08518b
1. There is an exposed central pad on the underside of the MLP8 package. This is pulled, internally, to V
SS
,
and must not be allowed to be connected to any other voltage or signal line on the PCB.
2. See
section for package dimensions, and how to identify pin-1.
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NUMONYX [ NUMONYX B.V ]
