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GE28F640L18B105 参数 Datasheet PDF下载

GE28F640L18B105图片预览
型号: GE28F640L18B105
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash, 4MX16, 105ns, PBGA56, 0.75 MM PITCH, VFBGA-56]
分类和应用: 内存集成电路
文件页数/大小: 94 页 / 1222 K
品牌: NUMONYX [ NUMONYX B.V ]
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28F640L18, 28F128L18, 28F256L18  
12.3  
AC Write Specifications  
Nbr.  
Symbol  
Parameter (1, 2)  
Min  
Max  
Units  
Notes  
W1  
W2  
tPHWL RST# high recovery to WE# low  
tELWL CE# setup to WE# low  
150  
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
1,2,3  
1,2,3  
1,2,4  
W3  
tWLWH WE# write pulse width low  
tDVWH Data setup to WE# high  
tAVWH Address setup to WE# high  
tWHEH CE# hold from WE# high  
tWHDX Data hold from WE# high  
tWHAX Address hold from WE# high  
tWHWL WE# pulse width high  
50  
50  
50  
0
W4  
W5  
W6  
1,2  
W7  
0
W8  
0
W9  
20  
200  
0
1,2,5  
W10  
W11  
W12  
W13  
W14  
W16  
tVPWH  
tQVVL  
V
V
setup to WE# high  
PP  
PP  
1,2,3,7  
hold from Status read  
tQVBL WP# hold from Status read  
tBHWH WP# setup to WE# high  
tWHGL WE# high to OE# low  
tWHQV WE# high to read valid  
0
1,2,3,7  
1,2,9  
200  
0
t
+35  
ns 1,2,3,6,10  
AVQV  
Write to Asynchronous Read Specifications  
W18 tWHAV WE# high to Address valid  
0
ns  
1,2,3,6  
Write to Synchronous Read Specifications  
W19 tWHCH/L WE# high to Clock valid  
19  
19  
ns  
ns  
1,2,3,6,10  
W20  
tWHVH WE# high to ADV# high  
NOTES:  
1. Write timing characteristics during erase suspend are the same as write-only operations.  
2. A write operation can be terminated with either CE# or WE#.  
3. Sampled, not 100% tested.  
4. Write pulse width low (t  
WE# high (whichever occurs first). Hence, t  
5. Write pulse width high (t  
WE# low (whichever occurs last). Hence, t  
or t  
) is defined from CE# or WE# low (whichever occurs last) to CE# or  
WLWH  
ELEH  
= t  
= t  
= t  
.
WLWH  
ELEH  
WLEH  
ELWH  
or t  
) is defined from CE# or WE# high (whichever occurs first) to CE# or  
WHWL  
EHEL  
= t  
= t  
= t  
).  
WHWL  
EHEL  
WHEL  
EHWL  
6. tWHVH or tWHCH/L must be met when transitioning from a write cycle to a synchronous burst read.  
7. V and WP# should be at a valid level until erase or program success is determined.  
PP  
8. This specification is only applicable when transitioning from a write cycle to an asynchronous read. See  
spec W19 and W20 for synchronous read.  
9. When doing a Read Status operation following a program or erase write cycle, W14 is 20ns.  
10.Add 10ns if the write operations results in a RCR or block lock status change, for the subsequent read  
operation to reflect this change.  
58  
Datasheet