28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
10.1.5
Write
A write occurs when both CE# and WE# are low and OE# is high. Commands are written to the
Command User Interface (CUI) using standard microprocessor write timings to control flash
memory operations. The CUI does not occupy an addressable memory location. The address and
data buses are latched on the rising edge of the second WE# or CE# pulse, whichever occurs first.
Table 30 shows the available commands, and Appendix A provides detailed information about
moving between the different modes of operation using CUI commands.
Two commands modify array data:
• Program (40H).
• Erase (20H).
Writing either of these commands to the internal Command User Interface (CUI) initiates a
sequence of internally timed functions that culminate in the completion of the requested task
(unless that operation is aborted by either RP# being driven to V for t
or an appropriate
IL
PLRH
Suspend command).
11.0
Operating Modes
The flash memory device has four read modes:
• read array
• read identifier
• read status
• read query
See Figure 1 “B3 Architecture Block Diagram” on page 10).
The flash memory device also has two write modes:
• program
• block erase
Three additional modes are available only during suspended operations:
• erase suspend to program
• erase suspend to read
• program suspend to read
Table 28 “Command Codes and Descriptions” on page 54 summarizes the commands used to reach
these modes.
Appendix A, “Write State Machine Current/Next States,” is a comprehensive chart showing the
state transitions.
Datasheet
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
18 Aug 2005
53
NUMONYX [ NUMONYX B.V ]
