Numonyx™ Wireless Flash Memory (W18)
Table 13: Read Operations — 90 nm (Sheet 2 of 2)
#
Symbol
Parameter
(1,2)
V
CCQ
=
1.7 V – 1.95 V
Min
Max
Unit
Notes
Synchronous Specifications
R301
R302
R303
R304
R305
R306
R307
t
AVCH
t
VLCH
t
ELCH
t
CHQV
t
CHQX
t
CHAX
t
CHTV
Address Valid Setup to CLK
ADV# Low Setup to CLK
CE# Low Setup to CLK
CLK to Output Valid
Output Hold from CLK
Address Hold from CLK
CLK to WAIT Valid
7
7
7
-
3
7
-
-
-
-
11
-
-
11
ns
ns
ns
ns
ns
ns
ns
3
8
8
Notes:
1.
See
for timing measurements and
maximum allowable input slew rate.
2.
AC specifications assume the data bus voltage is less than or equal to V
CCQ
when a read operation is initiated.
3.
Address hold in synchronous-burst mode is defined as t
CHAX
or t
VHAX
, whichever timing specification is satisfied first.
4.
OE# may be delayed by up to t
ELQV
– t
GLQV
after the falling edge of CE# without impact to t
ELQV
.
5.
Sampled, not 100% tested.
6.
Applies only to subsequent synchronous reads.
7.
During the initial access of a synchronous burst read, data from the first word may begin to be driven onto the data bus as
early as the first clock edge after t
AVQV
.
8.
All the preceding specifications apply to all densities.
Table 14: Read Operations — 130 nm (Sheet 1 of 2)
Symbol
V
CCQ
=
1.7 V – 2.24 V
Parameter
(1,2)
#
-60
Min
Max
Unit
Notes
Asynchronous Specifications
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
t
AVAV
t
AVQV
t
ELQV
t
GLQV
t
PHQV
t
ELQX
t
GLQX
t
EHQZ
t
GHQZ
t
OH
t
EHEL
t
ELTV
t
EHTZ
Read Cycle Time
Address to Output Valid
CE# Low to Output Valid
OE# Low to Output Valid
RST# High to Output Valid
CE# Low to Output Low-Z
OE# Low to Output Low-Z
CE# High to Output High-Z
OE# High to Output High-Z
CE# (OE#) High to Output Low-Z
CE# Pulse Width High
CE# Low to WAIT Valid
CE# High to WAIT High-Z
60
-
-
-
-
0
0
-
-
0
-
-
14
-
60
60
20
150
-
-
14
14
-
14
11
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5
4,5
5
4,5
4,5
6
5,6
6
7,8
7,8
7,8
4
Latching Specifications
November 2007
Order Number: 290701-18
Datasheet
27
NUMONYX [ NUMONYX B.V ]
