Buck Converter Operation
DEVICE INFORMATION
The LP3971 includes three high efficiency step down DC-DC
switching buck converters. Using a voltage mode architec-
ture with synchronous rectification, the buck converters have
the ability to deliver up to 1600 mA depending on the input
voltage, output voltage, ambient temperature and the induc-
tor chosen. There are three modes of operation depending
on the current required - PWM, PFM, and shutdown. The
device operates in PWM mode at load currents of approxi-
mately 100 mA or higher, having voltage tolerance of 3%
with 95% efficiency or better. Lighter load currents cause the
device to automatically switch into PFM for reduced current
consumption. Shutdown mode turns off the device, offering
the lowest current consumption (IQ,
= 0.01 µA
SHUTDOWN
20180711
typ). Additional features include soft-start, under voltage pro-
tection, current overload protection, and thermal shutdown
protection. The part uses an internal reference voltage of
0.5V. It is recommended to keep the part in shutdown until
the input voltage is 2.8V or higher.
FIGURE 3. Typical PWM Operation
Internal Synchronous Rectification
CIRCUIT OPERATION
While in PWM mode, the converters uses an internal NFET
as a synchronous rectifier to reduce rectifier forward voltage
drop and associated power loss. Synchronous rectification
provides a significant improvement in efficiency whenever
the output voltage is relatively low compared to the voltage
drop across an ordinary rectifier diode.
The buck converter operates as follows. During the first
portion of each switching cycle, the control block turns on the
internal PFET switch. This allows current to flow from the
input through the inductor to the output filter capacitor and
load. The inductor limits the current to a ramp with a slope of
(VIN–VOUT)/L, by storing energy in a magnetic field.
Current Limiting
During the second portion of each cycle, the controller turns
the PFET switch off, blocking current flow from the input, and
then turns the NFET synchronous rectifier on. The inductor
draws current from ground through the NFET to the output
filter capacitor and load, which ramps the inductor current
down with a slope of - VOUT/L.
A current limit feature allows the converters to protect itself
and external components during overload conditions. PWM
mode implements current limiting using an internal compara-
tor that trips at 2.1A (typ). If the output is shorted to ground
the device enters a timed current limit mode where the NFET
is turned on for a longer duration until the inductor current
falls below a low threshold, ensuring inductor current has
more time to decay, thereby preventing runaway.
The output filter stores charge when the inductor current is
high, and releases it when inductor current is low, smoothing
the voltage across the load.
The output voltage is regulated by modulating the PFET
switch on time to control the average current sent to the load.
The effect is identical to sending a duty-cycle modulated
rectangular wave formed by the switch and synchronous
rectifier at the SW pin to a low-pass filter formed by the
inductor and output filter capacitor. The output voltage is
equal to the average voltage at the SW pin.
PFM OPERATION
At very light loads, the converter enters PFM mode and
operates with reduced switching frequency and supply cur-
rent to maintain high efficiency.
The part will automatically transition into PFM mode when
either of two conditions occurs for a duration of 32 or more
clock cycles:
A: The inductor current becomes discontinuous.
PWM OPERATION
B: The peak PMOS switch current drops below the IMODE
During PWM operation the converter operates as a voltage
mode controller with input voltage feed forward. This allows
the converter to achieve good load and line regulation. The
DC gain of the power stage is proportional to the input
voltage. To eliminate this dependence, feed forward in-
versely proportional to the input voltage is introduced.
<
level, (Typically IMODE 30 mA + VIN/42Ω).
While in PWM (Pulse Width Modulation) mode, the output
voltage is regulated by switching at a constant frequency
and then modulating the energy per cycle to control power to
the load. At the beginning of each clock cycle the PFET
switch is turned on and the inductor current ramps up until
the comparator trips and the control logic turns off the switch.
The current limit comparator can also turn off the switch in
case the current limit of the PFET is exceeded. Then the
NFET switch is turned on and the inductor current ramps
down. The next cycle is initiated by the clock turning off the
NFET and turning on the PFET.
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