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LM809M3X-2.93 参数 Datasheet PDF下载

LM809M3X-2.93图片预览
型号: LM809M3X-2.93
PDF下载: 下载PDF文件 查看货源
内容描述: 3引脚微处理器复位电路 [3-Pin Microprocessor Reset Circuits]
分类和应用: 微处理器复位电路
文件页数/大小: 8 页 / 184 K
品牌: NSC [ NATIONAL SEMICONDUCTOR ]
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LM809/LM810
Applications Information
Benefits of Precision Reset Thresholds
A microprocessor supply supervisor must provide a reset
output within a predictable range of the supply voltage. A
common threshold range is between 5% and 10% below the
nominal supply voltage. The 4.63V and 3.08V options of the
LM809/810 use highly accurate circuitry to ensure that the
reset threshold occurs only within this range (for 5V and 3.3V
supplies). The other voltage options have the same tight
tolerance to ensure a reset signal for other narrow monitor
ranges. See
for examples of how the standard reset
thresholds apply to 3V, 3.3V, and 5V nominal supply volt-
ages.
TABLE 1. Reset Thresholds Related to Common
Supply Voltages
Reset
Threshold
4.63
±
3%
4.38
±
3%
4.00
±
3%
3.08
±
3%
2.93
±
3%
2.63
±
3%
2.45
±
3%
85 - 90%
79 - 84%
90 - 95%
86 - 90%
77 - 81%
72 - 76%
3.0V
3.3V
5.0V
90 - 95%
85 - 90%
78 - 82%
Typically, for the 4.63V and 4.38V version of the LM809/810,
a V
CC
transient that goes 100mV below the reset threshold
and lasts 20µs or less will not cause a reset pulse. A 0.1 µF
bypass capacitor mounted as close as possible to the V
CC
pin will provide additional transient rejection.
10105709
FIGURE 2. Maximum Transient Duration without
Causing a Reset Pulse vs. Reset Comparator
Overdrive
Interfacing to µPs with Bidirectional Reset Pins
Microprocessors with bidirectional reset pins, such as the
Motorola 68HC11 series, can be connected to the LM809
RESET output. To ensure a correct output on the LM809
even when the microprocessor reset pin is in the opposite
state, connect a 4.7kΩ resistor between the LM809 RESET
output and the µP reset pin, as shown in
Buffer the
LM809 RESET output to other system components.
Ensuring a Valid Reset Output Down to V
CC
= 0V
When V
CC
falls below 1V, the LM809 RESET output no
longer sinks current. A high-impedance CMOS logic input
connected to RESET can therefore drift to undetermined
voltages. To prevent this situation, a 100kΩ resistor should
be connected from the RESET output to ground, as shown in
A 100kΩ pull-up resistor to V
CC
is also recommended for the
LM810, if RESET is required to remain valid for V
CC
<
1V.
10105711
10105710
FIGURE 1. RESET Valid to V
CC
= Ground Circuit
Negative-Going V
CC
Transients
The LM809/810 are relatively immune to short
negative-going transients or glitches on V
CC
shows
the maximum pulse width a negative-going V
CC
transient
can have without causing a reset pulse. In general, as the
magnitude of the transient increases, going further below the
threshold, the maximum allowable pulse width decreases.
FIGURE 3. Interfacing to Microprocessors with
Bidirectional Reset I/O
LLP Mounting
The LLP package requires special mounting techniques
which are detailed in National Semiconductor Application
Note AN-1187. Referring to the section PCB Design Recom-
mendations, it should be noted that the pad style which
should be used with the LLP package is the NSMD (non-
solder mask defined) type.
www.national.com
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