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LM1881N 参数 Datasheet PDF下载

LM1881N图片预览
型号: LM1881N
PDF下载: 下载PDF文件 查看货源
内容描述: LM1881视频同步分离 [LM1881 Video Sync Separator]
分类和应用:
文件页数/大小: 12 页 / 302 K
品牌: NSC [ National Semiconductor ]
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Electrical Characteristics LM1881–X  
VCC = 5V; RSET = 680 k; TA = –40˚C to +85˚C by correlation with 100% electrical testing at TA=25˚C  
Parameter  
Supply Current  
Conditions  
VCC = 5V  
Min  
Typ  
5.2  
5.5  
1.5  
70  
Max  
10  
Units  
Outputs at  
Logic 1  
Pin 2  
mA  
VCC = 12V  
12  
DC Input Voltage  
1.3  
55  
1.8  
85  
V
Input Threshold Voltage  
Input Discharge Current  
Input Clamp Charge Current  
RSET Pin Reference Voltage  
Composite Sync. & Vertical  
Outputs  
mV  
µA  
mA  
V
Pin 2; VIN = 2V  
Pin 2; VIN = 1V  
Pin 6;  
6
11  
16  
0.2  
1.10  
4.0  
11.0  
2.4  
10.0  
4.0  
11.0  
0.8  
1.22  
4.5  
1.35  
IOUT = 40 µA;  
Logic 1  
VCC = 5V  
VCC = 12V  
VCC = 5V  
VCC = 12V  
VCC = 5V  
VCC = 12V  
V
V
V
IOUT = 1.6 mA  
Logic 1  
3.6  
4.5  
Burst Gate & Odd/Even  
Outputs  
IOUT = 40 µA;  
Logic 1  
Composite Sync. Output  
Vertical Sync. Output  
Burst Gate Output  
Odd/Even Output  
Vertical Sync Width  
Burst Gate Width  
Vertical Default Time  
IOUT = −1.6 mA; Logic 0; Pin 1  
IOUT = −1.6 mA; Logic 0; Pin 3  
IOUT = −1.6 mA; Logic 0; Pin 5  
IOUT = −1.6 mA; Logic 0; Pin 7  
0.2  
0.2  
0.2  
0.2  
230  
4
0.8  
0.8  
0.8  
0.8  
588  
4.7  
90  
V
V
V
V
140  
2.2  
32  
µs  
µs  
µs  
2.7 kfrom Pin 5 to VCC  
65  
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. For guaranteed specifications and test conditions, see the  
Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed.  
Note 2: For operation in ambient temperatures above 25˚C, the device must be derated based on a 150˚C maximum junction temperature and a package thermal  
resistance of 110˚C/W, junction to ambient.  
Note 3: ESD susceptibility test uses the “human body model, 100 pF discharged through a 1.5 kresistor”.  
Note 4: Typicals are at T = 25˚C and represent the most likely parametric norm.  
J
Note 5: Relative difference between the input clamp voltage and the minimum input voltage which produces a horizontal output pulse.  
Note 6: Careful attention should be made to prevent parasitic capacitance coupling from any output pin (Pins 1, 3, 5 and 7) to the R  
Note 7: Delay time between the start of vertical sync (at input) and the vertical output pulse.  
pin (Pin 6).  
SET  
Typical Performance Characteristics  
RSET Value Selection  
vs Vertical Serration  
Pulse Separation  
Vertical Default  
Sync Delay Time  
vs RSET  
00915007  
00915008  
3
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