DP83816
2.0 Pin Description
(Continued)
Clock Interface
Symbol
X1
LQFP Pin
No(s)
17
Dir
I
Description
Crystal/Oscillator Input:
This pin is the primary clock reference input for the
DP83816 and must be connected to a 25 MHz 0.005% (50ppm) clock source. The
DP83816 device supports either an external crystal resonator connected across
pins X1 and X2, or an external CMOS-level oscillator source connected to pin X1
only.
Crystal Output:
This pin is used in conjunction with the X1 pin to connect to an
external 25 MHz crystal resonator device. This pin must be left unconnected if an
external CMOS oscillator clock source is utilized. For more information see the
definition for pin X1.
X2
18
O
LED Interface
Symbol
LEDACTN/MA0
LQFP Pin
No(s)
142
Dir
O
Description
TX/RX Activity:
This pin is an output indicating transmit/receive activity. This pin is
driven low to indicate active transmission or reception, and can be used to drive a
low current LED (<6 mA). The activity event is stretched to a minimum duration of
approximately 50 ms.
100 Mb/s Link:
This pin is an output indicating the 100 Mb/s Link status. This pin is
driven low to indicate Good Link status for 100 Mb/s operation, and can be used to
drive a low current LED (<6 mA).
10 Mb/s Link:
This pin is an output indicating the 10 Mb/s Link status. This pin is
driven low to indicate Good Link status for 10 Mb/s operation, and can be used to
drive a low current LED (<6 mA).
LED100N/MA2
144
O
LED10N/MA1
143
O
Serial EEPROM Interface
Symbol
EESEL
EECLK/MA4
EEDI/MA3
LQFP Pin
No(s)
128
2
1
Dir
O
O
O
Description
EEPROM Chip Select:
This signal is used to enable an external EEPROM device.
EEPROM Clock:
During an EEPROM access (EESEL asserted), this pin is an
output used to drive the serial clock to an external EEPROM device.
EEPROM Data In:
During an EEPROM access (EESEL asserted), this pin is an
output used to drive opcode, address, and data to an external serial EEPROM
device.
EEPROM Data Out:
During an EEPROM access (EESEL asserted), this pin is an
input used to retrieve EEPROM serial read data.
This pin has an internal weak pull up.
MD1/CFGDISN
133
I/O
Configuration Disable:
When pulled low at power-on time, disables load of
configuration data from the EEPROM. Use 1 KΩ to ground to disable configuration
load.
EEDO/MD4
138
I
Note: DP83816 supports NMC93C46 for the EEPROM device.
9
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