欢迎访问ic37.com |
会员登录 免费注册
发布采购

COP8AME9EMW8 参数 Datasheet PDF下载

COP8AME9EMW8图片预览
型号: COP8AME9EMW8
PDF下载: 下载PDF文件 查看货源
内容描述: 8位CMOS闪存微控制器,具有8K内存,双通道运算放大器,虚拟EEROM ,温度传感器, 10位A / D和掉电复位 [8-Bit CMOS Flash Microcontroller with 8k Memory, Dual Op Amps, Virtual EEROM, Temperature Sensor,10-Bit A/D and Brownout Reset]
分类和应用: 闪存传感器温度传感器微控制器和处理器外围集成电路运算放大器光电二极管时钟
文件页数/大小: 83 页 / 908 K
品牌: NSC [ National Semiconductor ]
 浏览型号COP8AME9EMW8的Datasheet PDF文件第14页浏览型号COP8AME9EMW8的Datasheet PDF文件第15页浏览型号COP8AME9EMW8的Datasheet PDF文件第16页浏览型号COP8AME9EMW8的Datasheet PDF文件第17页浏览型号COP8AME9EMW8的Datasheet PDF文件第19页浏览型号COP8AME9EMW8的Datasheet PDF文件第20页浏览型号COP8AME9EMW8的Datasheet PDF文件第21页浏览型号COP8AME9EMW8的Datasheet PDF文件第22页  
10.0 Functional Description (Continued)  
20006361  
FIGURE 6. RAM Organization  
= 0  
Security disabled. Flash Memory read and write  
are allowed.  
10.4.1 Virtual EEPROM  
The Flash memory and the User ISP functions (see Section  
5.7), provide the user with the capability to use the flash  
program memory to back up user defined sections of RAM.  
This effectively provides the user with the same nonvolatile  
data storage as EEPROM. Management, and even the  
amount of memory used, are the responsibility of the user,  
however the flash memory read and write functions have  
been provided in the boot ROM.  
Bits 4, 3 These bits are reserved and must be 0.  
Bit 2  
= 1  
WATCHDOG feature disabled. G1 is a general  
purpose I/O.  
= 0  
WATCHDOG feature enabled. G1 pin is  
WATCHDOG output with weak pullup.  
Bit 1  
One typical method of using the Virtual EEPROM feature  
would be for the user to copy the data to RAM during system  
initialization, periodically, and if necessary, erase the page of  
Flash and copy the contents of the RAM back to the Flash.  
= 1  
= 0  
HALT mode disabled.  
HALT mode enabled.  
Bit 0  
= 1  
Execution following RESET will be from Flash  
Memory.  
10.5 OPTION REGISTER  
The Option register, located at address 0x1FFF in the Flash  
Program Memory, is used to configure the user selectable  
security, WATCHDOG, and HALT options. The register can  
be programmed only in external Flash Memory programming  
or ISP Programming modes. Therefore, the register must be  
programmed at the same time as the program memory. The  
contents of the Option register shipped from the factory read  
00 Hex.  
= 0  
Flash Memory is erased. Execution following RE-  
SET will be from Boot ROM with the MICROWIRE/  
PLUS ISP routines.  
The COP8 assembler defines a special ROM section type,  
CONF, into which the Option Register data may be coded.  
The Option Register is programmed automatically by pro-  
grammers that are certified by National.  
The user needs to ensure that the FLEX bit will be set when  
the device is programmed.  
The format of the Option register is as follows:  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
The following examples illustrate the declaration of the Op-  
tion Register.  
WATCH  
DOG  
Reserved  
SECURITY  
Reserved  
HALT  
FLEX  
Syntax:  
Bits 7, 6 These bits are reserved and must be 0.  
Bit 5  
[label:].sect  
.db  
config, conf  
value ;1 byte,  
;configures  
= 1  
Security enabled. Flash Memory read and write  
are not allowed except in User ISP/Virtual E2 com-  
mands. Mass Erase is allowed.  
www.national.com  
18  
 复制成功!