ADC0816/ADC0817
Electrical Characteristics
Symbol
CONTROL INPUTS
V
IN(1)
V
IN(0)
I
IN(1)
I
IN(0)
I
CC
V
OUT(1)
V
OUT(0)
V
OUT(0)
I
OUT
Logical “1” Input Voltage
Logical “0” Input Voltage
Logical “1” Input Current
(The Control Inputs)
Logical “0” Input Current
(The Control Inputs)
Supply Current
Parameter
(Continued)
Digital Levels and DC Specifications:
ADC0816CCN, ADC0817CCN — 4.75V≤V
CC
≤5.25V,
−40˚C≤T
A
≤+85˚C
unless other-
wise noted.
Conditions
Min
V
CC
−1.5
1.5
V
IN
=15V
V
IN
=0
f
CLK
=640 kHz
I
O
=−360 µA, T
A
=85˚C
I
O
=−300 µA, T
A
=125˚C
Logical “0” Output Voltage
Logical “0” Output Voltage EOC
TRI-STATE Output Current
I
O
=1.6 mA
I
O
=1.2 mA
V
O
=V
CC
V
O
=0
−3.0
0.45
0.45
3.0
V
V
µA
µA
V
CC
−0.4
−1.0
0.3
3.0
1.0
Typ
Max
Units
V
V
µA
µA
mA
V
DATA OUTPUTS AND EOC (INTERRUPT)
Logical “1” Output Voltage
Electrical Characteristics
Timing Specifications:
V
CC
=V
REF(+)
=5V, V
REF(−)
=GND, t
r
=t
f
=20 ns and T
A
=25˚C unless otherwise noted.
Symbol
t
WS
t
WALE
t
s
T
H
t
D
t
H1
, t
H0
t
1H,
t
0H
t
C
f
c
t
EOC
C
IN
C
OUT
Parameter
Minimum Start Pulse Width
Minimum ALE Pulse Width
Minimum Address Set-Up Time
Minimum Address Hold Time
Analog MUX Delay Time
from ALE
OE Control to Q Logic State
OE Control to Hi-Z
Conversion Time
Clock Frequency
EOC Delay Time
Input Capacitance
TRI-STATE Output
Capacitance
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its specified operating conditions.
Note 2:
All voltages are measured with respect to GND, unless otherwise specified.
Note 3:
A zener diode exists, internally, from V
CC
to GND and has a typical breakdown voltage of 7 V
DC
.
Note 4:
Two on-chip diodes are tied to each analog input which will forward conduct for analog input voltages one diode drop below ground or one diode drop
greater than the V
CC
supply. The spec allows 100 mV forward bias of either diode. This means that as long as the analog V
IN
does not exceed the supply voltage
by more than 100 mV, the output code will be correct. To achieve an absolute 0 V
DC
to 5 V
DC
input voltage range will therefore require a minimum supply voltage
of 4.900 V
DC
over temperature variations, initial tolerance and loading.
Note 5:
Total unadjusted error includes offset, full-scale, and linearity errors. See
Figure 3.
None of these A/Ds requires a zero or full-scale adjust. However, if an
all zero code is desired for an analog input other than 0.0V, or if a narrow full-scale span exists (for example: 0.5V to 4.5V full-scale) the reference voltages can be
adjusted to achieve this. See
Figure 13.
Note 6:
Comparator input current is a bias current into or out of the chopper stabilized comparator. The bias current varies directly with clock frequency and has
little temperature dependence (Figure
6).
See paragraph 4.0.
Note 7:
If start pulse is asynchronous with converter clock or if f
c
at f
c
≤
640 kHz take start high within 100 ns of clock going low.
Conditions
(Figure
5)
(Note 7)
(Figure
5)
(Figure
5)
(Figure
5)
R
S
=OΩ (Figure
5)
C
L
=50 pF, R
L
=10k (Figure
8)
C
L
=10 pF, R
L
=10k (Figure
8)
f
c
=640 kHz, (Figure
5)
(Note 8)
(Figure
5)
At Control Inputs
At TRI-STATE Outputs (Note 8)
Min
Typ
100
100
25
25
1
125
125
Max
200
200
50
50
2.5
250
250
116
1280
8+2µs
Units
ns
ns
ns
ns
µs
ns
ns
µs
kHz
Clock
Periods
pF
pF
90
10
0
100
640
10
10
15
15
>
640 kHz, the minimum start pulse width is 8 clock periods plus 2 µs. For synchronous operation
Note 8:
The outputs of the data register are updated one clock cycle before the rising edge of EOC.
Note 9:
Human body model, 100 pF discharged through a 1.5 kΩ resistor.
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