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54ABT573E-QML 参数 Datasheet PDF下载

54ABT573E-QML图片预览
型号: 54ABT573E-QML
PDF下载: 下载PDF文件 查看货源
内容描述: 八D型锁存器与三态输出 [Octal D-Type Latch with TRI-STATE Outputs]
分类和应用: 总线驱动器总线收发器锁存器逻辑集成电路信息通信管理
文件页数/大小: 12 页 / 407 K
品牌: NSC [ National Semiconductor ]
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Function Table  
Inputs  
Functional Description  
Outputs  
The ’ABT573 contains eight D-type latches with TRI-STATE  
output buffers. When the Latch Enable (LE) input is HIGH,  
data on the Dn inputs enters the latches. In this condition the  
latches are transparent, i.e., a latch output will change state  
each time its D input changes. When LE is LOW the latches  
store the information that was present on the D inputs a  
setup time preceding the HIGH-to-LOW transition of LE. The  
TRI-STATE buffers are controlled by the Output Enable (OE)  
input. When OE is LOW, the buffers are in the bi-state mode.  
When OE is HIGH the buffers are in the high impedance  
mode but this does not interfere with entering new data into  
the latches.  
OE  
L
LE  
H
H
L
D
H
L
O
H
L
L
L
X
X
O0  
Z
H
X
=
=
=
H
L
X
O
HIGH Voltage Level  
LOW Voltage Level  
Immaterial  
=
Value stored from previous clock cycle  
0
Logic Diagram  
DS100219-3  
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.  
www.national.com  
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