Instruction Set (Continued)
8.1.5.2 index Field (Index Selection)
Table 8-15. mod base Field Encoding
The index field (Table 8-14) specifies the index register
used by the offset mechanism for offset address calcula-
tion. When no index register is used (index field = 100),
the ss value must be 00 or the effective address is unde-
fined.
mod Field
base Field
within
s-i-b
Byte
(bits 2:0)
within
mode/rm
Byte
32-Bit Address Mode
with mod r/m and s-i-b
Bytes Present
(bits 7:6)
00
00
00
00
00
00
00
00
000
001
010
011
100
101
110
111
DS:[EAX+(scaled index)]
DS:[ECX+(scaled index)]
DS:[EDX+(scaled index)]
DS:[EBX+(scaled index)]
SS:[ESP+(scaled index)]
DS:[d32+(scaled index)]
DS:[ESI+(scaled index)]
DS:[EDI+(scaled index)]
Table 8-14. index Field Encoding
Index Field
Index Register
000
001
010
011
100
101
110
111
EAX
ECX
EDX
EBX
none
EBP
ESI
01
01
01
01
01
01
01
01
000
001
010
011
100
101
110
111
DS:[EAX+(scaled index)+d8]
DS:[ECX+(scaled index)+d8]
DS:[EDX+(scaled index)+d8]
DS:[EBX+(scaled index)+d8]
SS:[ESP+(scaled index)+d8]
SS:[EBP+(scaled index)+d8]
DS:[ESI+(scaled index)+d8]
DS:[EDI+(scaled index)+d8]
EDI
8.1.5.3 Base Field (s-i-b Present)
In Table 8-8, the note “s-i-b is present” for certain entries
forces the use of the mod and base field as listed in Table
8-15. The first two digits in the first column of Table 8-15
identifies the mod bits in the mod r/m byte. The last three
digits in the first column of this table identify the base
fields in the s-i-b byte.
10
10
10
10
10
10
10
10
000
001
010
011
100
101
110
111
DS:[EAX+(scaled index)+d32]
DS:[ECX+(scaled index)+d32]
DS:[EDX+(scaled index)+d32]
DS:[EBX+(scaled index)+d32]
SS:[ESP+(scaled index)+d32]
SS:[EBP+(scaled index)+d32]
DS:[ESI+(scaled index)+d32]
DS:[EDI+(scaled index)+d32]
Revision 1.1
217
www.national.com
NSC [ National Semiconductor ]
