Instruction Set (Continued)
8.1.1 Prefix (Optional)
8.1.2 Opcode
Prefix bytes can be placed in front of any instruction to
modify the operation of that instruction. When more than
one prefix is used, the order is not important. There are
five types of prefixes that can be used:
The opcode field specifies the operation to be performed
by the instruction. The opcode field is either one or two
bytes in length and may be further defined by additional
bits in the mod r/m byte. Some operations have more than
one opcode, each specifying a different form of the opera-
tion. Certain opcodes name instruction groups. For exam-
ple, opcode 80h names a group of operations that have
an immediate operand and a register or memory operand.
The reg field may appear in the second opcode byte or in
the mod r/m byte.
1. Segment Override explicitly specifies which segment
register the instruction will use for effective address
calculation.
2. Address Size switches between 16-bit and 32-bit
addressing by selecting the non-default address size.
The opcode may contain w, d, s and eee opcode fields, for
example, as shown in Table 8-27 on page 223.
3. Operand Size switches between 16-bit and 32-bit
operand size by selecting the non-default operand
size.
8.1.2.1 w Field (Operand Size)
When used, the 1-bit w field selects the operand size dur-
ing 16-bit and 32-bit data operations. See Table 8-4.
4. Repeat is used with a string instruction to cause the
instruction to be repeated for each element of the
string.
5. Lock is used to assert the hardware LOCK# signal
during execution of the instruction.
Table 8-4. w Field Encoding
Operand Size
Table 8-3 lists the encoding for different types of prefix
bytes.
w
Field
16-Bit Data
Operations
32-Bit Data
Operations
0
1
8 bits
8 bits
Table 8-3. Instruction Prefix Summary
16 bits
32 bits
Prefix
Encoding Description
ES:
26h
2Eh
36h
3Eh
64h
65h
66h
67h
Override segment default, use ES
for memory operand.
8.1.2.2 d Field (Operand Direction)
When used, the 1-bit d field determines which operand is
taken as the source operand and which operand is taken
as the destination. See Table 8-5.
CS:
SS:
DS:
FS:
GS:
Override segment default, use CS
for memory operand.
Override segment default, use SS
for memory operand.
Override segment default, use DS
for memory operand.
Table 8-5. d Field Encoding
d
Field
Direction of
Operation
Source
Operand
Destination
Operand
Override segment default, use FS
for memory operand.
0
Register-to-Register
or
reg
mod r/m
or
mod ss-index-
base
Override segment default, use GS
for memory operand.
Register-to-Memory
Operand
Size
Make operand size attribute the
inverse of the default.
1
Register-to-Register
or
mod r/m
or
reg
Address
Size
Make address size attribute the
inverse of the default.
Memory-to-Register mod ss-index-
base
LOCK
F0h
F2h
Assert LOCK# hardware signal.
REPNE
Repeat the following string
instruction.
REP/REPE
F3h
Repeat the following string
instruction.
www.national.com
214
Revision 1.1
NSC [ National Semiconductor ]
