Integrated Functions (Continued)
4.5 DISPLAY CONTROLLER
The GXLV processor incorporates a display controller that
retrieves display data from the memory controller and for-
mats it for output on a variety of display devices. The
GXLV processor connects directly to the graphics Geode
I/O companion. The display controller includes a display
FIFO, compression/decompression (codec) hardware,
hardware cursor, a 256-entry-by-18-bit palette RAM (plus
three extension colors), display timing generator, dither
and frame-rate-modulation circuitry for TFT panels, and
versatile output formatting logic. A diagram of the display
controller subsystem is shown in Figure 4-14.
32
Compressed
Line Buffer
(64x32 bit)
18
8
32
Memory
Video
16
Data
Output
Format
18
Dither
and
FRM
Display
FIFO
(64x64 bit)
64
8
Graphics
Extensions
Codec
9
18
Palette
Addr.
Logic
Palette
RAM
(264x18
2
Cursor
Latch
Pseudo/True
Color Mux
bit)
9
20
Memory
Address
Generator
Control Registers
and
Control Logic
Output
Control
Memory
Address
Timing
Generator
Figure 4-14. Display Controller Block Diagram
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