Functional Diagram
Truth Table
OE
L
L
L
H
H
H
H
H
H
DIR
X
L
H
L
L
L
H
H
H
LE
L
H
H
L
L
H
L
L
H
ECL
Port
LOW
(Cut-Off)
Input
LOW
(Cut-Off)
L
H
X
L
H
Latched
L
H
Latched
L
H
X
(Notes 1, 4)
(Notes 1, 4)
(Notes 1, 3)
(Notes 2, 4)
(Notes 2, 4)
(Notes 2, 4)
Z
Input
(Notes 1, 3)
(Notes 2, 3)
TTL
Port
Z
Notes
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
Note 1:
ECL input to TTL output mode.
Note 2:
TTL input to ECL output mode.
Note 3:
Retains data present before LE set HIGH.
Note 4:
Latch is transparent.
DS100295-5
Note:
LE, DIR, and OE use ECL logic levels
Detail
DS100295-6
3
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