SM5843A×1
FUNCTIONAL DESCRIPTION
The basic arithmetic block is shown in figure 1, and
the function of each block is described in the follow-
ing sections.
Input
fs
2 - times oversampling
153 - tap (response 1 )or
25 - tap (response 2 )
FIR
2fs
2 - times oversampling
29 - tap FIR
4fs
Deemphasis IIR
filter
Deemphasis OFF
Deemphasis ON
4fs
Mute function
4fs
2 - times oversampling
17 - tap FIR
8fs
Output
Figure 1. Arithmetic block diagram
8-times Oversampling (Interpolation)
Digital Deemphasis
The interpolation arithmetic block is comprised of 3
cascaded, 2-times FIR interpolation filters, as shown
in figure 1.
The digital deemphasis filter has the same construc-
tion as analog filters. It is implemented as an IIR fil-
ter to faithfully reproduce the gain and phase
characteristics of standard analog deemphasis filters.
The three sets of filter coefficients for the three fs =
32.0/44.1/48.0 kHz sampling frequencies are
selected by FSEL1 and FSEL2 when the sampling
frequency is specified, as shown in the following
table. Deemphasis is ON when DEMP is HIGH, and
OFF when DEMP is LOW.
The input signal is sampled at rate fs, and then 8-
times oversampling data is output. Sampling noise in
the 0.5465fs to 7.4535fs stopband for the sharp roll-
off (response 1) characteristic, 0.745fs to 7.255fs for
the slow roll-off (response 2) characteristic, is
removed by the interpolation filter.
FSEL1
LOW
LOW
HIGH
HIGH
FSEL2
LOW
HIGH
LOW
HIGH
Sampling frequency (fs)
44.1 kHz
48 kHz
Test mode
32 kHz
Note that test mode is not available for operation.
NIPPON PRECISION CIRCUITS—14
NPC [ NIPPON PRECISION CIRCUITS INC ]
