CF5074A
PAD LAYOUT
(Unit: µm)
(1070,1270)
XT
VC
INHN
TESN
5
6
7
8
4
XTN
3
DA5074
VDD
VSS
(0,0)
1
2
Q
Chip size: 1.07
×
1.27mm
Chip thickness: 300 ± 30µm (CF5074A-1)
180 ± 20µm (CF5074A-3)
PAD size: 100
×
100
µ
m (TESN: 80
×
80
µ
m)
Chip base: V
SS
potential
PAD DESCRIPTION AND DIMENSIONS
Pad No.
1
2
3
4
5
6
7
8
Name
VSS
Q
VDD
XTN
XT
VC
INHN
TESN
I/O
–
O
–
O
I
I
I
I
(
−
) supply pin
Output pin. High-impedance in standby mode
(+) supply pin
Oscillator output. Crystal connection pin
Oscillator input. Crystal connection pin
Oscillation frequency control voltage input pin.
Positive polarity (frequency increases with increasing voltage)
Output state control voltage input pin.
Standby mode when LOW. Power-saving pull-up resistor built-in
Test pin (leave open)
Description
Pad dimensions [µm]
X
111
958
958
930
140
140
140
140
Y
111
111
567
1104
1104
932
734
547
BLOCK DIAGRAM
XTN
VDD
XT
R
VC
3
Oscillator
Detection
VC
R
VC
1
C
VC
1
R
UP
R
VC
2
C
VC
2
CMOS
Output Buffer
Q
VSS
INHN
SEIKO NPC CORPORATION —2
NPC [ NIPPON PRECISION CIRCUITS INC ]
