9. OLED controller Instruction Table (Built‐In SSD1322 Controller/Driver)
Code
RESET
value
Instruction
Description
D/C
0
HEX
00
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Enable the Grayscale table settings. (see command 0xB8)
Enable Grayscale
Table
0
0
0
0
0
0
0
0
Set column start and end address
A[6:0]: Column start address. Range: 0‐119d
B[6:0]: Column end address. Range: 0‐119d
Set Column
Address
0
1
1
0
15
0
*
*
0
0
A6
B6
1
0
A5
B5
0
1
A4
B4
1
0
A3
B3
1
1
A2
B2
1
0
A1
B1
0
1
A0
B0
0
0
A[6:0]
B[6:0]
5C
119d
Enable MCU to write Data into RAM
Write RAM
Command
Enable MCU to read Data from RAM
Read RAM
0
5D
0
1
0
1
1
1
0
1
Command
Set Row Address
Set row start and end address
A[6:0]: Row start address. Range: 0‐127d
B[6:0]: Row end address. Range: 0‐127d
0
1
1
0
1
1
75
0
*
*
1
0
*
1
A6
B6
0
0
*
1
A5
B5
1
A5
0
1
0
A3
B3
0
0
0
1
A2
B2
0
A2
0
0
A1
B1
0
A1
0
1
A0
B0
0
A0
1
0
A[6:0]
B[6:0]
A0
A[5:0]
B[4]
A4
B4
0
A4
B4
127d
A[0] = 0; Horizontal Address Increment
A[0] = 1; Vertical Address Increment
A[1] = 0; Disable Column Address remap
A[1] = 1; Enable Column Address remap
A[2] = 0; Disable Nibble remap
0
0
0
0
0
0
Set Remap
A[2] = 1; Enable Nibble remap
A[4] = 0; Scan from COM0 to COM[N‐1]
A[4] = 1; Scan from COM[N‐1] to COM0
A[5] = 0; Disable COM split Odd/Even
A[5] = 1; Enable COM split Odd/Even
B[4] = 0; Disable Dual COM mode
B[4] = 1; Enable Dual COM mode
Note: A[5] must be 0 if B[4] is 1.
Set display RAM display start line register from 0‐127.
0
0
Set Display Start
Line
Set Display Offset
0
1
0
1
0
A1
A[6:0]
A2
A[6:0]
A4/A7
1
*
1
*
1
0
A6
0
A6
0
1
A5
1
A5
1
0
A4
0
A4
0
0
A3
0
A3
0
0
A2
0
A2
X2
0
A1
1
A1
X1
1
A0
0
A0
X0
Set vertical shift by COM from 0~127.
0xA4 = Entire display OFF
0xA5 = Entire display ON, all pixels Grayscale level 15
0xA6 = Normal display
0xA6
Display Mode
0xA7 = Inverse display
Turns ON partial mode.
A[6:0] = Address of start row
B[6:0] = Address of end row (B[6:0] > A[6:0])
Enable Partial
Display
0
1
1
0
0
A8
A[6:0]
B[6:0]
A9
1
0
0
1
1
0
A6
B6
0
1
A5
B5
1
0
A4
B4
0
1
A3
B3
1
0
A2
B2
0
0
A1
B1
0
0
A0
B0
1
Exit Partial Display mode
A[0] = 0; External VDD
Exit Partial Display
Function Selection
AB
0
1
0
1
0
1
1
[12]
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