4.5.1 Internal connection diagram of external bus interface .......................................................................61
4.5.2 Internal connection diagram of PCI bus interface ..............................................................................62
4.5.3 External connection diagram of external bus interface (example of connection with V850E/ME2)....63
4.5.4 External connection diagram of PCI bus interface.............................................................................64
4.6 Cautions on Designing FPGA.....................................................................................................65
4.6.1 FPGA fitting design............................................................................................................................65
4.6.2 PCI bus interface timing parameters (as constraint of PCI CLK = 33 MHz).......................................65
4.6.3 SDRAM interface timing ....................................................................................................................66
CHAPTER 5 APPLICATION EXAMPLES..............................................................................................67
5.1 Block Diagram of Evaluation Board...........................................................................................67
5.2 Specifications of Evaluation Board............................................................................................68
5.3 Example of Evaluation Board Connection Circuit....................................................................69
5.4 Evaluation Board Memory Space ...............................................................................................70
5.5 Sample Program Examples.........................................................................................................72
5.5.1 Development tools.............................................................................................................................72
5.5.2 Program configuration .......................................................................................................................72
5.5.3 V850E/ME2 PCI host bridge macro initialization sample program list ...............................................73
5.5.4 PCI configuration space access sample program list ........................................................................76
5.5.5 IDE HDD access sample program list................................................................................................79
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Application Note U17121EJ1V1AN
NEC [ NEC ]
