20.3.2 Restore.........................................................................................................................................601
20.3.3 Priorities of maskable interrupts ...................................................................................................602
20.3.4 Interrupt control register (xxlCn) ...................................................................................................606
20.3.5 Interrupt mask registers 0 to 3 (IMR0 to IMR3).............................................................................608
20.3.6 In-service priority register (ISPR)..................................................................................................610
20.3.7 ID flag...........................................................................................................................................611
20.3.8 Watchdog timer mode register 1 (WDTM1)..................................................................................612
20.4 External Interrupt Request Input Pins (NMI, INTP0 to INTP6) ............................................. 613
20.4.1 Noise elimination ..........................................................................................................................613
20.4.2 Edge detection..............................................................................................................................613
20.5 Software Exceptions................................................................................................................ 616
20.5.1 Operation......................................................................................................................................616
20.5.2 Restore.........................................................................................................................................617
20.5.3 EP flag..........................................................................................................................................618
20.6 Exception Trap ......................................................................................................................... 619
20.6.1 Illegal opcode ...............................................................................................................................619
20.6.2 Debug trap....................................................................................................................................621
20.7 Multiple Interrupt Servicing Control....................................................................................... 623
20.8 Interrupt Response Time......................................................................................................... 625
20.9 Periods in Which Interrupts Are Not Acknowledged by CPU ............................................. 626
20.10 Cautions.................................................................................................................................... 626
CHAPTER 21 KEY INTERRUPT FUNCTION ......................................................................................627
21.1 Function.................................................................................................................................... 627
21.2 Register..................................................................................................................................... 628
CHAPTER 22 STANDBY FUNCTION...................................................................................................629
22.1 Overview ................................................................................................................................... 629
22.2 Registers................................................................................................................................... 632
22.3 HALT Mode ............................................................................................................................... 635
22.3.1 Setting and operation status.........................................................................................................635
22.3.2 Releasing HALT mode .................................................................................................................635
22.4 IDLE Mode................................................................................................................................. 637
22.4.1 Setting and operation status.........................................................................................................637
22.4.2 Releasing IDLE mode...................................................................................................................637
22.5 STOP Mode............................................................................................................................... 639
22.5.1 Setting and operation status.........................................................................................................639
22.5.2 Releasing STOP mode.................................................................................................................639
22.5.3 Securing oscillation stabilization time when STOP mode is released...........................................641
22.6 Subclock Operation Mode....................................................................................................... 642
22.6.1 Setting and operation status.........................................................................................................642
22.6.2 Releasing subclock operation mode.............................................................................................642
22.7 Sub-IDLE Mode......................................................................................................................... 644
22.7.1 Setting and operation status.........................................................................................................644
22.7.2 Releasing sub-IDLE mode............................................................................................................644
CHAPTER 23 RESET FUNCTION ........................................................................................................646
23.1 Overview ................................................................................................................................... 646
15
User’s Manual U16890EJ1V0UD
NEC [ NEC ]
