µPD31172
1.2 Special Status Pins
(1/2)
Signal Name
SCLK
After Reset
When HOLDAK# = 1
Hi-Z
Hi-Z
Hi-Z
−
Hi-Z
AD (0:24)
DATA (0:31)
LCDCS#
RD#
Hi-Z
Hi-Z
−
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
−
Hi-Z
WR#
Hi-Z
LCDRDY
ROMCS (2:3)#
CKE
Hi-Z
Hi-Z
Hi-Z
UUCAS#
ULCAS#
MRAS (0:1)#
UCAS#
Hi-Z
Hi-Z
Hi-Z
Hi-Z
LCAS#
Hi-Z
IOR#
−
IOW#
−
−
RESET
−
−
IOCS16#
IOCHRDY
HOLDRQ#
HOLDAK#
SRAS#
Hi-Z
Hi-Z
1
Hi-Z
Hi-Z
1
−
−
Hi-Z
Hi-Z
−
Hi-Z
SCAS#
Hi-Z
−
BUSRQ (0:1)#
BUSAK (0:1)#
INTRP
1
Normal operation
Normal operation
Normal operation
Normal operation
Normal operation
−
0
IRQ
0
USBINT#
PS2INT
1
0
BUSCLK
ARBCLKSEL
DP (1:2)
DN (1:2)
PPON (1:2)
OCI (1:2)
IEN
−
−
−
1
Normal operation
Normal operation
Normal operation
−
0
0
−
−
−
WAKE
0
Normal operation
Remark 0: Low level, 1: High level, Hi-Z: High impedance
11
Data Sheet U14388EJ2V0DS00
NEC [ NEC ]
