CHAPTER 5 CLOCK GENERATOR
(3) Subclock control register (CSS)
CSS specifies whether the main system or subsystem clock oscillator is to be selected. It also specifies the
CPU clock operation status.
CSS is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input sets CSS to 00H.
Figure 5-4. Format of Subclock Control Register
Symbol
CSS
7
0
6
0
5
4
3
0
2
0
1
0
0
0
Address
FFF2H
After reset
00H
R/W
CLS CSS0
R/WNote
CLS
0
CPU clock operation status
Operation based on the output of the (divided) main system clock
Operation based on the subsystem clock
1
CSS0
Selection of the main system or subsystem clock oscillator
(Divided) output from the main system clock oscillator
Output from the subsystem clock oscillator
0
1
Note Bit 5 is read only.
Caution Bits 0 to 3, 6, and 7 must be set to 0.
User’s Manual U15075EJ1V0UM00
107
NEC [ NEC ]
