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N01L083WC2AT-55I 参数 Datasheet PDF下载

N01L083WC2AT-55I图片预览
型号: N01L083WC2AT-55I
PDF下载: 下载PDF文件 查看货源
内容描述: [Standard SRAM, 128KX8, 55ns, CMOS, PDSO32]
分类和应用: 静态存储器光电二极管内存集成电路
文件页数/大小: 10 页 / 77 K
品牌: NANOAMP [ NANOAMP SOLUTIONS, INC. ]
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NanoAmp Solutions, Inc.  
Timing Test Conditions  
N01L083WC2A  
Item  
0.1V to 0.9 V  
Input Pulse Level  
Input Rise and Fall Time  
Input and Output Timing Reference Levels  
Output Load  
CC  
CC  
5ns  
0.5 V  
CC  
CL = 30pF  
o
Operating Temperature  
-40 to +85 C  
Timing  
2.3 - 3.6 V  
2.7 - 3.6 V  
Item  
Symbol  
Units  
Min.  
Max.  
Min.  
Max.  
t
Read Cycle Time  
70  
55  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
RC  
t
Address Access Time  
70  
70  
35  
55  
55  
30  
AA  
t
Chip Enable to Valid Output  
Output Enable to Valid Output  
Chip Enable to Low-Z output  
Output Enable to Low-Z Output  
Chip Disable to High-Z Output  
Output Disable to High-Z Output  
Output Hold from Address Change  
Write Cycle Time  
CO  
t
OE  
t
10  
5
10  
5
LZ  
t
OLZ  
t
0
20  
20  
0
15  
15  
HZ  
t
0
0
OHZ  
t
10  
70  
50  
50  
40  
0
10  
55  
45  
45  
35  
0
OH  
t
WC  
t
Chip Enable to End of Write  
Address Valid to End of Write  
Write Pulse Width  
CW  
t
AW  
t
WP  
t
Address Setup Time  
AS  
t
Write Recovery Time  
0
0
WR  
t
Write to High-Z Output  
20  
15  
WHZ  
t
Data to Write Time Overlap  
Data Hold from Write Time  
End Write to Low-Z Output  
40  
0
35  
0
DW  
t
DH  
t
5
5
ns  
OW  
Stock No. 23033-03 1/02  
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.  
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