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MU9C2485A-90TCI 参数 Datasheet PDF下载

MU9C2485A-90TCI图片预览
型号: MU9C2485A-90TCI
PDF下载: 下载PDF文件 查看货源
内容描述: WidePort LANCAM㈢家庭 [WidePort LANCAM㈢ Family]
分类和应用: 局域网
文件页数/大小: 28 页 / 161 K
品牌: MUSIC [ MUSIC SEMICONDUCTORS ]
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WidePort LANCAM® Family  
REGISTER BIT ASSIGNMENTS Continued  
27  
31  
30  
29  
28  
26  
17 16  
25  
24 23  
22  
21  
20 19 18  
4485A/L  
2485A/L  
/MA  
/MA  
/FL Skip Empty  
Page Address Bits, PA14–4  
Page Address Bits, PA15–5  
Page Address Bits, PA15–6  
/MM  
/MM  
/MM  
14  
Empty  
/FL Skip  
/MA  
15  
/FL Skip Empty  
1485A/L  
0
10  
13  
12  
11  
9
6
5
3
7
4
2
0
8
1
4485A/L  
2485A/L  
1485A/L  
Page Address, PA3–0  
Page Address, PA4–0  
Page Address, PA5–0  
Next Free Address, NF11–0  
Next Free Address, NF10–0  
Next Free Address, NF9–0  
Note: The Next Free Address register is read only, and is accessed by performing  
a Command Read cycle immediately following a TCO NF instruction.  
Table 11: Next Free Address Register Bit Assignments  
31  
30  
29  
28  
27  
26 25  
24 23  
22  
21  
20 19 18 17 16  
/MA  
/MA  
/MM /FL Skip Empty  
/MM /FL Skip Empty  
4485A/L  
2485A/L  
1485A/L  
Page Address Bits, PA14–4  
Page Address Bits, PA15–5  
/MA  
15  
/MM /FL Skip  
Empty  
Page Address Bits, PA15–6  
0
10  
14  
13  
12  
11  
9
8
7
6
5
4
3
2
0
1
Page Address, PA3–0  
4485A/L  
2485A/L  
1485A/L  
Match Address, AM11–0  
Match Address, AM10–0  
Match Address, AM9–0  
Page Address, PA4–0  
Page Address, PA5–0  
Note: The Status register is read only, and is accessed by performing a Command Read cycle.  
Table 12: Status Register Bit Assignments  
31  
30  
29  
28  
27  
26 25  
24 23  
22  
21  
20 19 18 17 16  
Page Address Bits, PA14–4  
Page Address Bits, PA15–5  
Page Address Bits, PA15–6  
/FL Skip Empty  
/MM  
/MM  
4485A/L  
2485A/L  
1485A/L  
/MA  
/MA  
/MA  
15  
Empty  
Skip  
/FL  
Empty  
11  
/FL Skip  
13 12  
0
10  
/MM  
14  
1
9
8
7
6
5
4
3
2
0
Device ID = 445 H  
Device ID = 245 H  
Device ID = 145 H  
4485A/L  
2485A/L  
1485A/L  
PS  
PS  
PS  
Note: The Persistent Source register is read only, and is accessed by performing a  
Command Read cycle immediately following a TCO PS instruction.  
Table 13: Persistent Source Register Bit Assignments  
Rev. 2  
22  
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