®
®
ADS-CCD1202
CALIBRATION PROCEDURE
(Refer to Figures 2 and 3)
Any offset and/or gain calibration procedures should not be
implemented until devices are fully warmed up. To avoid
interaction, offset must be adjusted before gain. The ranges of
adjustment for the circuit of Figure 2 are guaranteed to
compensate for the ADS-CCD1202’s initial accuracy errors and
may not be able to compensate for additional system errors.
+15V
ZERO/
OFFSET
ADJUST
–15V
20k
Ω
200k
Ω
2k
Ω
For the ADS-CCD1202, offset adjusting is normally
accomplished at the point where all output bits are 0’s and the
LSB just changes from a 0 to a 1. This digital output transition
ideally occurs when the applied analog input is +1/2LSB
(+1.2207mV).
Gain adjusting is accomplished when all bits are 1’s and the
LSB just changes from a 1 to a 0. This transition ideally occurs
when the analog input is at +full scale minus 1 1/2 LSB’s
(+9.99634V).
Offset Adjust Procedure
1. Apply a train of pulses to the START CONVERT input (pin
16) so the converter is continuously converting. If using
LED’s on the outputs, a 200kHz conversion rate will reduce
flicker.
GAIN
ADJUST
+15V
1.98k
Ω
50
Ω
To Pin 20 of
ADS-CCD1202
SIGNAL
INPUT
2. Apply +1.2207mV to the ANALOG INPUT (pin 20).
3. Adjust the offset potentiometer until the output bits are
0000 0000 00000 and the LSB flickers between 0 and 1.
Gain Adjust Procedure
1. Apply +9.99634V to the ANALOG INPUT (pin 20).
2. Adjust the gain potentiometer until all output bits are 1’s and
the LSB flickers between 1 and 0.
Table 2. ADS-CCD1202 Output Coding
–15V
Figure 2. ADS-CCD1202 Calibration Circuit
All fixed resistors in Figure 2 should be metal-film types, and
multi-turn potentiometers should have TCR’s of 100ppm/°C or
less to minimize drift with temperature. In many applications,
the CCD will require an offset-adjust (black balance) circuit
near its output and also a gain stage, presumably with adjust
capabilities, to match the output voltage of the CCD to the
input range of the AID. If one is performing a "system I/O
calibration" (from light in to digital out), these circuits can be
used to compensate for the relatively small initial offset and
gain errors of the A/D. This would eliminate the need for the
circuit shown in Figure 2.
Input Voltage
(0 to +10V)
+9.9976
+7.5000
+5.0000
+2.5000
+0.0024
0
Unipolar
Scale
+FS – 1LSB
+3/4 FS
+1/2 FS
+1/4 FS
+1LSB
0
Digital Output
MSB LSB
1111 1111 1111
1100 0000 0000
1000 0000 0000
0100 0000 0000
0000 0000 0001
0000 0000 0000
+5V
4.7µF
+
0.1µF
13
12 BIT 1 (MSB)
11 BIT 2
10 BIT 3
9 BIT 4
THERMAL REQUIREMENTS
All DATEL sampling A/D converters are fully characterized and
specified over operating temperature (case) ranges of 0 to
+70°C and – 55 to +125°C. All room-temperature (T
A
= +25°C)
production testing is performed without the use of heat sinks or
forced-air cooling. Thermal impedance figures for each device
are listed in their respective specification tables.
These devices do not normally require heat sinks, however,
standard precautionary design and layout procedures should
be used to ensure devices do not overheat. The ground and
power planes beneath the package, as well as all pcb signal
runs to and from the device, should be as heavy as possible to
help conduct heat away from the package. Electrically
insulating, thermally-conductive "pads" may be installed
underneath the package. Devices should be soldered to boards
rather than "socketed," and of course, minimal air flow over the
surface can greatly help reduce the package temperature.
In more severe ambient conditions, the package/junction
temperature of a given device can be reduced dramatically
(typically 35%) by using one of DATEL’s HS Series heat sinks.
See Ordering Information for the assigned part number. See
page 1-183 of the DATEL Data Acquisition Components
Catalog for more information on the HS Series. Request DATEL
Application Note AN-8, "Heat Sinks for DIP Data Converters,"or
contact DATEL directly, for additional information.
14
–12V/–15V
4.7µF
+
4.7µF
+12V/+15V
0.1µF
24
8 BIT 5
19, 23
0.1µF
22
0 to +10V
ADS-CCD1202
7 BIT 6
6 BIT 7
5 BIT 8
4 BIT 9
+
ANALOG
20 INPUT
21 +10V REF. OUT
3 BIT 10
2 BIT 11
1 BIT 12 (LSB)
0.1µF
+
4.7µF
17, 18
NO CONNECT
15 EOC
Figure 3. Typical ADS-CCD1202 Connection Diagram
A/D converters are calibrated by positioning their digital
outputs exactly on the transition point between two adjacent
digital output codes. This can be accomplished by connecting
LED’s to the digital outputs and adjusting until certain LED’s
"flicker" equally between on and off. Other approaches employ
digital comparators or microcontrollers to detect when the
outputs change from one code to the next.
4.
MURATA-PS [ MURATA POWER SOLUTIONS INC. ]
