®
®
ADS-CCD1202
+25°C
ANALOG OUTPUT
Internal Reference
Voltage
Drift
External Current
DIGITAL OUTPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading “1"
Logic Loading "0"
Delay, Falling Edge of EOC
to Output Data Valid
Output Coding
POWER REQUIREMENTS, ±15V
Power Supply Range
+15V Supply
–15V Supply
+5V Supply
Power Supply Current
+15V Supply
–15V Supply
+5V Supply
Power Dissipation
Power Supply Rejection
POWER REQUIREMENTS, ±12V
Power Supply Range
+12V Supply
–12V Supply
+5V Supply
Power Supply Current
+12V Supply
–12V Supply
+5V Supply
Power Dissipation
Power Supply Rejection
+11.5
–11.5
+4.75
—
—
—
—
—
+12.0
–12.0
+5.0
+43
–48
+82
1.45
—
+12.5
–12.5
+5.25
+55
–55
+95
1.65
±0.01
+11.5
–11.5
+4.75
—
—
—
—
—
+12.0
–12.0
+5.0
+43
–48
+82
1.45
—
+12.5
–12.5
+5.25
+55
–55
+95
1.65
±0.01
+11.5
–11.5
+4.75
—
—
—
—
—
+12.0
–12.0
+5.0
+43
–48
+82
1.45
—
+12.5
–12.5
+5.25
+55
–55
+95
1.65
±0.01
Volts
Volts
Volts
mA
mA
mA
Watts
%FSR/%V
+14.5
–14.5
+4.75
—
—
—
—
—
+15.0
–15.0
+5.0
+43
–48
+82
1.75
—
+15.5
–15.5
+5.25
+55
–55
+95
1.95
±0.01
+14.5
–14.5
+4.75
—
—
—
—
—
+15.0
–15.0
+5.0
+43
–48
+82
1.75
—
+15.5
–15.5
+5.25
+55
–55
+95
1.95
±0.01
+14.5
–14.5
+4.75
—
—
—
—
—
+15.0
–15.0
+5.0
+43
–48
+82
1.75
—
+15.5
–15.5
+5.25
+55
–55
+95
1.95
±0.01
Volts
Volts
Volts
mA
mA
mA
Watts
%FSR/%V
+2.4
—
—
—
—
—
—
—
—
—
—
+0.4
–4
+4
35
+2.4
—
—
—
—
—
—
—
—
—
Straight Binary
—
+0.4
–4
+4
35
+2.4
—
—
—
—
—
—
—
—
—
—
+0.4
–4
+4
35
Volts
Volts
mA
mA
ns
MIN.
+9.95
—
—
TYP.
+10.0
±5
—
MAX.
+10.05
—
1.5
MIN.
+9.95
—
—
0 to +70°C
TYP.
+10.0
±5
—
MAX.
+10.05
—
1.5
MIN.
+9.95
—
—
–55 to +125°C
TYP.
+10.0
±5
—
MAX.
+10.05
—
1.5
UNITS
Volts
ppm/ºC
mA
Footnotes:
All power supplies must be on before applying a start convert pulse. All
supplies and the clock (START CONVERT) must be present during warmup
periods. The device must be continuously converting during this time.
Contact DATEL for availability of other input voltage ranges.
A 200ns wide start convert pulse is used for all production testing.
Effective bits is equal to:
(SNR + Distortion) – 1.76 +
20 log
6.02
Full Scale Amplitude
Actual Input Amplitude
This is the time required before the A/D output data is valid after
the analog input is back within the specified range.
TECHNICAL NOTES
1. Obtaining fully specified performance from the ADS-CCD1202
requires careful attention to pc-card layout and power supply
decoupling. The device’s analog and digital ground systems are
connected to each other internally. For optimal performance, tie
all ground pins (14, 19, and 23) directly to a large
analog
ground plane beneath the package.
Bypass all power supplies, as well as the REFERENCE
OUTPUT (pin 21), to ground with 4.7µF tantalum capacitors in
parallel with 0.1µF ceramic capacitors. Locate the bypass
capacitors as close to the unit as possible. If the user-installed
offset and gain adjusting circuit shown in Figure 2 is used, also
locate it as close to the ADS-CCD1202 as possible.
2. ADS-CCD1202 achieves its specified accuracies without
external calibration. If required, the device’s small initial offset
and gain errors can be reduced to zero using the input circuit of
Figure 2. When using this circuit, or any similar offset and gain-
calibration hardware, make adjustments following warmup. To
avoid interaction, always adjust offset before gain.
3. When operating the ADS-CCD1202 from ±12V supplies, do not
drive external circuitry with the REFERENCE OUTPUT (pin 21).
The reference’s accuracy and drift specifications may not be
met, and loading the circuit may cause accuracy errors within
the converter.
4. A passive bandpass filter is used at the input of the A/D for all
production testing.
5. Applying a start pulse while a conversion is in progress (EOC =
logic "1") initiates a new and inaccurate conversion cycle. Data
for the interrupted and subsequent conversions will be invalid.
Table 1. Zero and Gain Adjust
Input Voltage
Range
0 to +10V
Zero Adjust
+1/2 LSB
+1.2207mV
Gain Adjust
+FS – 1 1/2 LSB
+9.99634V
3.
MURATA-PS [ MURATA POWER SOLUTIONS INC. ]
