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MP1482DS 参数 Datasheet PDF下载

MP1482DS图片预览
型号: MP1482DS
PDF下载: 下载PDF文件 查看货源
内容描述: 2A , 18V同步整流降压转换器 [2A, 18V Synchronous Rectified Step-Down Converter]
分类和应用: 转换器稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管
文件页数/大小: 12 页 / 291 K
品牌: MPS [ MONOLITHIC POWER SYSTEMS ]
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MP1482 – 2A, 18V SYNCHRONOUS RECTIFIED, STEP-DOWN CONVERTER  
The worst-case condition occurs at VIN = 2VOUT  
,
The characteristics of the output capacitor also  
affect the stability of the regulation system. The  
MP1482 can be optimized for a wide range of  
capacitance and ESR values.  
where IC1 = ILOAD/2. For simplification, choose  
the input capacitor whose RMS current rating  
greater than half of the maximum load current.  
The input capacitor can be electrolytic, tantalum  
or ceramic. When using electrolytic or tantalum  
capacitors, a small, high quality ceramic  
capacitor, i.e. 0.1μF, should be placed as close  
to the IC as possible. When using ceramic  
capacitors, make sure that they have enough  
capacitance to provide sufficient charge to  
prevent excessive voltage ripple at input. The  
input voltage ripple for low ESR capacitors can  
be estimated by:  
Compensation Components  
MP1482 employs current mode control for easy  
compensation and fast transient response. The  
system stability and transient response are  
controlled through the COMP pin. COMP pin is  
the output of the internal transconductance  
error amplifier. A series capacitor-resistor  
combination sets a pole-zero combination to  
control the characteristics of the control system.  
The DC gain of the voltage feedback loop is  
given by:  
ILOAD  
VOUT  
VIN  
VOUT  
V  
1  
IN  
C1fS  
V
IN  
VFB  
AVDC RLOAD GCS AEA  
VOUT  
Where C1 is the input capacitance value.  
Where AVEA is the error amplifier voltage gain;  
GCS is the current sense transconductance and  
Output Capacitor  
The output capacitor is required to maintain the  
DC output voltage. Ceramic, tantalum, or low  
ESR electrolytic capacitors are recommended.  
Low ESR capacitors are preferred to keep the  
output voltage ripple low. The output voltage  
ripple can be estimated by:  
RLOAD is the load resistor value.  
The system has two poles of importance. One  
is due to the compensation capacitor (C3) and  
the output resistor of the error amplifier, and the  
other is due to the output capacitor and the load  
resistor. These poles are located at:  
VOUT  
VOUT  
VIN  
1
VOUT  
1  
RESR  
fS L  
8 fS C2  
GEA  
fP1  
2C3AVEA  
Where C2 is the output capacitance value and  
RESR is the equivalent series resistance (ESR)  
value of the output capacitor.  
1
fP2  
2  C2RLOAD  
In the case of ceramic capacitors, the  
impedance at the switching frequency is  
dominated by the capacitance. The output  
voltage ripple is mainly caused by the  
capacitance. For simplification, the output  
voltage ripple can be estimated by:  
Where GEA is the error amplifier transconductance.  
The system has one zero of importance, due to the  
compensation capacitor (C3) and the compensation  
resistor (R3). This zero is located at:  
1
fZ1  
2  C3R3  
VOUT  
VOUT  
VIN  
ΔVOUT  
1  
2
8 fS L C2  
The system may have another zero of  
importance, if the output capacitor has a large  
capacitance and/or a high ESR value. The zero,  
due to the ESR and capacitance of the output  
capacitor, is located at:  
In the case of tantalum or electrolytic capacitors,  
the ESR dominates the impedance at the  
switching frequency. For simplification, the  
output ripple can be approximated to:  
1
fESR  
VOUT  
VOUT  
ΔVOUT  
 1  
RESR  
2  C2RESR  
fS L  
VIN  
MP1482 Rev. 1.31  
7/9/2012  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2012 MPS. All Rights Reserved.  
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