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MP1039EY 参数 Datasheet PDF下载

MP1039EY图片预览
型号: MP1039EY
PDF下载: 下载PDF文件 查看货源
内容描述: [Liquid Crystal Driver, 20-Segment, PDSO28, SOIC-28]
分类和应用: 驱动光电二极管接口集成电路
文件页数/大小: 13 页 / 259 K
品牌: MPS [ MONOLITHIC POWER SYSTEMS ]
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MP1039 – FULL BRIDGE CCFL CONTROLLER
PIN FUNCTIONS
(continued)
Pin #
15
16
17
18
19
Name
VIN1
BT1
TG1
SW1
VCC1
Description
Input Power Rail, Side 1. Connect VIN1 directly to the drain of the side 1, top power
MOSFET.
Output Bootstrap, Side 1. BT1 provides gate bias for the side 1 top MOSFET. Connect a
capacitor from BT1 to SW1.
Top MOSFET Gate Output, Side 1.
Source of Top MOSFET, Side 1. Connect SW1 to the source of the side 1 top MOSFET and
the drain of the side 1 bottom MOSFET.
Linear Regulator Output and Bias Supply of Bottom Gate Driver, Side 1. VCC1 allows
bypassing the bias supply for the control circuitry. Bypass VCC1 with a 1µF or larger
ceramic capacitor. Connect to VCC2.
Bottom MOSFET Gate Output, Side 1.
Power Ground, Side 1. Connect PGND1 to the source of the bottom, side 1 MOSFET.
Input Power Rail, Side 2. Connect VIN2 directly to the drain of the top, side 2, external
power MOSFET.
Output Bootstrap, Side 2. BT2 provides gate bias for the side 2 top MOSFET. Connect a
capacitor from BT2 to SW2.
Top MOSFET Gate Output, Side 2.
Source of Top MOSFET, Side 2. Connect SW2 to the source of the side 2, top MOSFET
and the drain of the side 2, bottom MOSFET.
Voltage Rail Output, Side 2. VCC2 allows bypassing the bias supply for the control circuitry.
Bypass VCC2 with a 1µF or larger ceramic capacitor. Connect to VCC1. It is an input pin.
Bottom MOSFET Gate Output, Side 2.
Power Ground, Side 2. Connect PGND2 to the source of the bottom, side 2 MOSFET.
20
21
22
23
24
25
26
27
28
BG1
PGND1
VIN2
BT2
TG2
SW2
VCC2
BG2
PGND2
MP1039 Rev. 1.1
9/24/2007
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2007 MPS. All Rights Reserved.
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