UC3842B, 43B UC2842B, 43B
Figure 20. External Clock Synchronization
Figure 21. External Duty Cycle Clamp and
Multi–Unit Synchronization
V
ref
8(14)
R
8(14)
R
R
Bias
R
R
A
B
Bias
R
T
R
8
4
5.0k
5.0k
5.0k
External
Sync
Input
3
Osc
6
Osc
4(7)
C
T
+
R
4(7)
0.01
+
5
2
Q
2R
7
2R
S
R
2(3)
1(1)
EA
47
R
2(3)
EA
C
MC1455
1
1(1)
5(9)
5(9)
To Additional
UCX84XBs
The diode clamp is required if the Sync amplitude is large enough to cause the bottom
side of C to go more than 300 mV below ground.
1.44
2R )C
R
B
T
f
D
(max)
R
2R
B
(R
A
A
B
Figure 22. Adjustable Reduction of Clamp Level
Figure 23. Soft–Start Circuit
V
V
in
CC
7(12)
5.0V Ref
8(14)
5.0V Ref
R
R
8(14)
Bias
R
R
+
–
Bias
+
–
7(11)
6(10)
+
–
Q1
Osc
Osc
4(7)
2(3)
+
4(7)
V
+
Clamp
1.0V
S
R
R
R
1.0mA
2
1
S
R
1.0 mA
2R
Q
Q
2R
R
5(8)
3(5)
EA
1.0V
5(9)
2(3)
1(1)
EA
R
1.0M
Comp/Latch
R
S
1(1)
5(9)
C
t
≈ 3600C in µF
Soft–Start
1.67
R
R
2
R
Where: 0
≤
V
≤
1.0 V
1
–3
+ 0.33x10
Clamp
V
≈
Clamp
R
1
2
R
R
2
1
1
V
Clamp
I
pk(max)
R
S
11
MOTOROLA ANALOG IC DEVICE DATA