UC3842B, 43B UC2842B, 43B
possible using heavy copper runs to minimize radiated EMI.
Undervoltage Lockout
The Error Amp compensation circuitry and the converter
output voltage divider should be located close to the IC and
as far as possible from the power switch and other
noise–generating components.
Current mode converters can exhibit subharmonic
oscillations when operating at a duty cycle greater than 50%
with continuous inductor current. This instability is
independent of the regulator’s closed loop characteristics
and is caused by the simultaneous operating conditions of
fixed frequency and peak current detecting. Figure 19A
Two undervoltage lockout comparators have been
incorporated to guarantee that the IC is fully functional before
the output stage is enabled. The positive power supply
terminal (V ) and the reference output (V ) are each
CC
ref
monitored by separate comparators. Each has built–in
hysteresis to prevent erratic output behavior as their
respective thresholds are crossed. The V
comparator
CC
upper and lower thresholds are 16 V/10 V for the UCX842B,
and 8.4 V/7.6 V for the UCX843B. The V comparator upper
ref
and lower thresholds are 3.6 V/3.4 V. The large hysteresis
and low startup current of the UCX842B makes it ideally
suited in off–line converter applications where efficient
bootstrap startup techniques are required (Figure 33). The
UCX843B is intended for lower voltage dc–to–dc converter
applications. A 36 V zener is connected as a shunt regulator
shows the phenomenon graphically. At t , switch conduction
0
begins, causing the inductor current to rise at a slope of m .
1
This slope is a function of the input voltage divided by the
inductance. At t , the Current Sense Input reaches the
1
threshold established by the control voltage. This causes the
switch to turn off and the current to decay at a slope of m ,
from V
to ground. Its purpose is to protect the IC from
2
CC
excessive voltage that can occur during system startup. The
until the next oscillator cycle. The unstable condition can be
shown if a perturbation is added to the control voltage,
resulting in a small ∆I (dashed line). With a fixed oscillator
period, the current decay time is reduced, and the minimum
current at switch turn–on (t ) is increased by ∆I + ∆I m /m .
minimum operating voltage (V ) for the UCX842B is 11 V
and 8.2 V for the UCX843B.
CC
These devices contain a single totem pole output stage
that was specifically designed for direct drive of power
MOSFETs. It is capable of up to ±1.0 A peak drive current and
has a typical rise and fall time of 50 ns with a 1.0 nF load.
Additional internal circuitry has been added to keep the
Output in a sinking mode whenever an undervoltage lockout
is active. This characteristic eliminates the need for an
external pull–down resistor.
2
2
1
The minimum current at the next cycle (t ) decreases to (∆I +
3
∆I m /m ) (m /m ). This perturbation is multiplied by m /m
2
1
2
1
2
1
on each succeeding cycle, alternately increasing and
decreasing the inductor current at switch turn–on. Several
oscillator cycles may be required before the inductor current
reaches zero causing the process to commence again. If
m /m is greater than 1, the converter will be unstable. Figure
The SO–14 surface mount package provides separate
2
1
19B shows that by adding an artificial ramp that is
synchronized with the PWM clock to the control voltage, the
∆I perturbation will decrease to zero on succeeding cycles.
pins for V (output supply) and Power Ground. Proper
implementation will significantly reduce the level of switching
transient noise imposed on the control circuitry. This
C
This compensating ramp (m ) must have a slope equal to or
becomesparticularlyusefulwhenreducingtheI
clamp
3
pk(max)
slightly greater than m /2 for stability. With m /2 slope
level. The separate V supply input allows the designer
2
2
C
compensation, the average inductor current follows the
control voltage, yielding true current mode operation. The
compensating ramp can be derived from the oscillator and
added to either the Voltage Feedback or Current Sense
inputs (Figure 32).
added flexibility in tailoring the drive voltage independent of
V
. A zener clamp is typically connected to this input when
CC
driving power MOSFETs in systems where V
is greater
CC
than 20 V. Figure 25 shows proper power and control ground
connections in a current–sensing power MOSFET
application.
Figure 19. Continuous Current Waveforms
Reference
(A)
∆I
The 5.0 V bandgap reference is trimmed to ±1.0%
tolerance at T = 25°C on the UC284XB, and ±2.0% on the
J
Control Voltage
UC384XB. Its primary purpose is to supply charging current
to the oscillator timing capacitor. The reference has short–
circuit protection and is capable of providing in excess of
20 mA for powering additional control system circuitry.
m
m
2
1
Inductor
Current
m
m
2
1
l
l
m
m
m
m
2
1
2
1
l
l
Oscillator Period
Design Considerations
Do not attempt to construct the converter on
wire–wrap or plug–in prototype boards. High frequency
circuit layout techniques are imperative to prevent
pulse–width jitter. This is usually caused by excessive noise
pick–up imposed on the Current Sense or Voltage Feedback
inputs. Noise immunity can be improved by lowering circuit
impedances at these points. The printed circuit layout should
contain a ground plane with low–current signal and
high–current switch and output grounds returning on
separate paths back to the input filter capacitor. Ceramic
bypass capacitors (0.1 µF) connected directly to V , V ,
t
t
t
t
3
0
1
2
(B)
Control Voltage
m
3
∆I
m
1
m
2
Inductor
Current
Oscillator Period
t
CC
C
and V may be required depending upon circuit layout. This
ref
provides a low impedance path for filtering the high frequency
noise. All high current loops should be kept as short as
t
t
4
5
6
10
MOTOROLA ANALOG IC DEVICE DATA
MOTOROLA [ MOTOROLA ]
