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MCF5206 参数 Datasheet PDF下载

MCF5206图片预览
型号: MCF5206
PDF下载: 下载PDF文件 查看货源
内容描述: MCF5206集成的微处理器 [MCF5206 Integrated Microprocessor]
分类和应用: 微处理器
文件页数/大小: 8 页 / 211 K
品牌: MOTOROLA [ MOTOROLA ]
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Freescale Semiconductor, Inc.  
The primary features of the MCF5206 integrated processor include the following:  
• ColdFire Processor Core  
— Variable-length RISC  
— 32-bit internal address bus with up to 256 Mbytes of off-chip linear address space  
— 32-bit data bus  
— 16 user-visible 32-bit wide registers  
— Supervisor / User modes for system protection  
— Vector base register to relocate exception-vector table  
— Optimized for high-level language constructs  
— 17 MIPS at 33Mhz  
• 512-Byte Direct-Mapped Instruction Cache  
• 512-Byte On-Chip SRAM  
— Provides one-cycle access to critical code and data  
• DRAM Controller  
— Supports up to 32 Mbytes of memory using 4M x 1 DRAMs, 128 Mbytes using 16M x 1  
DRAMs, 256 Mbytes using 32x1 DRAMS  
— Programmable refresh timer provides CAS-before-RAS refresh  
— Support for 2 separate memory banks  
— Support for page-mode DRAMs and extended-data-out (EDO) DRAMs  
— Allows external bus master access  
• Dual Universal Synchronous/Asynchronous Receiver/Transmitter (DUART)  
— Full duplex operation  
— Flexible baud-rate generator  
— Modem control signals available (CTS, RTS)  
— Processor-interrupt capability  
— Compatible with MC68681 DUART programming model  
• Dual 16-Bit General-Purpose Multimode Timers  
— 8-bit prescaler  
— Timer input and output pins  
— 30ns resolution with 33MHz system clock  
— Processor-interrupt capability  
• Motorola Bus (M-Bus) Module  
— Interchip bus interface for EEPROMs, LCD controllers, A/D converters, keypads  
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— Compatible with industry-standard I C Bus  
— Master or slave modes support multiple masters  
— Automatic interrupt generation with programmable level  
• System Interface  
— Glueless bus interface to 8-, 16-, and 32-bit DRAM, SRAM, ROM, and I/O devices  
— 8 programmable chip-select signals  
— Programmable wait states and port sizes  
— Allows external bus masters to access chip-selects  
—System protection  
• 16-bit software watchdog timer with prescaler  
• Double bus fault monitor  
• Bus timeout monitor  
• Spurious interrupt monitor  
— Programmable interrupt controller  
• Low interrupt latency  
• 3 external interrupt inputs  
• Programmable interrupt priority and autovector generator  
— IEEE 1149.1 test (JTAG) support  
— 8-Bit General-Purpose I/O Interface  
• System Debug Support  
— Real-time trace  
— Background debug interface  
• Fully Static 5.0-Volt Operation  
• 160 Pin QFP Package  
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MCF5206 PRODUCT INFORMATION  
MOTOROLA  
For More Information On This Product,  
Go to: www.freescale.com  
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