欢迎访问ic37.com |
会员登录 免费注册
发布采购

MC68331CPV16 参数 Datasheet PDF下载

MC68331CPV16图片预览
型号: MC68331CPV16
PDF下载: 下载PDF文件 查看货源
内容描述: 用户手册 [User’s Manual]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 254 页 / 1319 K
品牌: MOTOROLA [ MOTOROLA ]
 浏览型号MC68331CPV16的Datasheet PDF文件第54页浏览型号MC68331CPV16的Datasheet PDF文件第55页浏览型号MC68331CPV16的Datasheet PDF文件第56页浏览型号MC68331CPV16的Datasheet PDF文件第57页浏览型号MC68331CPV16的Datasheet PDF文件第59页浏览型号MC68331CPV16的Datasheet PDF文件第60页浏览型号MC68331CPV16的Datasheet PDF文件第61页浏览型号MC68331CPV16的Datasheet PDF文件第62页  
During a low-power stop, unless the system clock signal is supplied by an external  
source and that source is removed, the SIM clock control logic and the SIM clock sig-  
nal (SIMCLK) continue to operate. The periodic interrupt timer and input logic for the  
RESET and IRQ pins are clocked by SIMCLK. The SIM can also continue to generate  
the CLKOUT signal while in low-power mode.  
The stop mode system integration module clock (STSIM) and stop mode external  
clock (STEXT) bits in SYNCR determine clock operation during low-power stop. Table  
4-9 is a summary of the effects of STSIM and STEXT. MODCLK value is the logic level  
on the MODCLK pin during the last reset before LPSTOP execution. Any clock in the  
off state is held low. If the synthesizer VCO is turned off during LPSTOP, there is a  
PLL relock delay after the VCO is turned back on.  
Table 4-9 Clock Control  
Mode  
LPSTOP  
No  
Pins  
SYNCR Bits  
STSIM STEXT  
Clock Status  
CLKOUT  
MODCLK  
EXTAL  
SIMCLK  
ECLK  
0
External  
Clock  
X
X
External  
Clock  
External  
Clock  
External  
Clock  
Yes  
Yes  
Yes  
Yes  
No  
0
0
0
0
1
1
1
1
1
External  
Clock  
0
0
1
1
X
0
0
1
1
0
1
0
1
X
0
1
0
1
External  
Clock  
Off  
Off  
4
External  
Clock  
External  
Clock  
External  
Clock  
External  
Clock  
External  
Clock  
External  
Clock  
Off  
Off  
External  
Clock  
External  
Clock  
External  
Clock  
External  
Clock  
Crystal or  
Reference  
VCO  
VCO  
VCO  
Yes  
Yes  
Yes  
Yes  
Crystal or  
Reference  
Crystal or  
Reference  
Off  
Off  
Crystal or  
Reference  
Crystal or  
Reference  
Crystal/  
Reference  
Off  
Crystal or  
Reference  
VCO  
Off  
Off  
Crystal or  
Reference  
VCO  
VCO  
VCO  
4.3.5 Loss of Reference Signal  
The state of the reset enable (RSTEN) bit in SYNCR determines what happens when  
clock logic detects a reference failure.  
When RSTEN is cleared (default state out of reset), the clock synthesizer is forced  
into an operating condition referred to as limp mode. Limp mode frequency varies  
from device to device, but maximum limp frequency does not exceed one half max-  
imum system clock when X = 0, or maximum system clock frequency when X = 1.  
When RSTEN is set, the SIM resets the MCU.  
The limp status bit (SLIMP) in SYNCR indicates whether the synthesizer has a refer-  
ence signal. It is set when a reference failure is detected.  
MOTOROLA  
4-16  
SYSTEM INTEGRATION MODULE  
MC68331  
USER’S MANUAL  
 
 复制成功!