BME — Bus Monitor External Enable
0 = Disable bus monitor function for an internal to external bus cycle.
1 = Enable bus monitor function for an internal to external bus cycle.
BMT[1:0] — Bus Monitor Timing
This field selects bus monitor time-out period.
Table D-7 Bus Monitor Period
BMT
00
Bus Monitor Time-out Period
64 System Clocks
01
32 System Clocks
10
16 System Clocks
11
8 System Clocks
D.3.13 PICR — Periodic Interrupt Control Register
$YFFA22
15
0
14
0
13
0
12
0
11
0
10
8
7
0
PIRQL
0
PIV
RESET:
D
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
Contains information concerning periodic interrupt priority and vectoring. PICR[10:0]
can be read or written at any time. PICR[15:11] are unimplemented and always return
zero.
PIRQL[2:0] — Periodic Interrupt Request Level
This field determines the priority of periodic interrupt requests.
PIV[7:0] — Periodic Interrupt Vector
The bits of this field contain the periodic interrupt vector number supplied by the SIM
when the CPU acknowledges an interrupt request.
D.3.14 PITR — Periodic Interrupt Timer Register
$YFFA24
15
0
14
0
13
0
12
0
11
0
10
0
9
0
8
7
0
0
PTP
PITM
RESET:
0
0
0
0
0
0
0
MODCLK
0
0
0
0
0
0
0
Contains the count value for the periodic timer. This register can be read or written at
any time.
PTP — Periodic Timer Prescaler Control
0 = Periodic timer clock not prescaled
1 = Periodic timer clock prescaled by a value of 512
PITM[7:0] — Periodic Interrupt Timing Modulus
This is the 8-bit timing modulus used to determine periodic interrupt rate. Use the fol-
lowing expression to calculate timer period.
MOTOROLA
D-20
REGISTER SUMMARY
MC68331
USER’S MANUAL