2.4 Register Mnemonics
CFORC — GPT Compare Force Register
CREG — Test Control Register C
CR[0:F] — QSM Command RAM
CSBARBT — Chip-Select Base Address Register Boot ROM
CSBAR[0:10] — Chip-Select Base Address Registers [0:10]
CSORBT — Chip-Select Option Register Boot ROM
CSOR[0:10] — Chip-Select Option Register [0:10]
CSPAR[0:1] — Chip-Select Pin Assignment Registers [0:1]
DDRE — Port E Data Direction Register
DDRF — Port F Data Direction Register
DDRGP — Port GP Data Direction Register
DDRQS — Port QS Data Direction Register
DREG — SIM Test Module Distributed Register
GPTMCR — GPT Module Configuration Register
ICR — GPT Interrupt Configuration Register
OC1D — Output Compare 1 Action Data Register
OC1M — Output Compare 1 Action Mask Register
PACNT — Pulse Accumulator Counter
PACTL — Pulse Accumulator Control Register
PEPAR — Port E Pin Assignment Register
PFPAR — Port F Pin Assignment Register
PICR — Periodic Interrupt Control Register
PITR — Periodic Interrupt Timer Register
PORTC — Port C Data Register
2
PORTE — Port E Data Register
PORTF — Port F Data Register
PORTGP — Port GP Data Register
PORTQS — Port QS Data Register
PQSPAR — Port QS Pin Assignment Register
PRESCL — GPT Prescaler Register
PWMA — PWM Control Register A
PWMB — PWM Control Register B
PWMBUFA — PWM Buffer Register A
PWMBUFB — PWM Buffer Register B
PWMC — PWM Control Register C
PWMCNT — PWM Counter
QILR — QSM Interrupt Level Register
QIVR — QSM Interrupt Vector Register
QSMCR — QSM Configuration Register
MC68331
USER’S MANUAL
NOMENCLATURE
MOTOROLA
2-5
MOTOROLA [ MOTOROLA ]
