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V54C316162V-5 参数 Datasheet PDF下载

V54C316162V-5图片预览
型号: V54C316162V-5
PDF下载: 下载PDF文件 查看货源
内容描述: 200/183/166/143 MHz的3.3伏, 4K刷新超高性能1M ×16 SDRAM 2组X达512Kbit ×16 [200/183/166/143 MHz 3.3 VOLT, 4K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16]
分类和应用: 内存集成电路光电二极管动态存储器
文件页数/大小: 21 页 / 306 K
品牌: MOSEL [ MOSEL VITELIC, CORP ]
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V54C316162V  
AC Characteristics (1,2,3) (Continued)  
T = 0 to 70°C; V = 0 V; V = 3.3 V ± 0.3 V, t = 1 ns  
A
SS  
CC  
T
Limit Values  
-55  
-5  
-6  
-7  
#
Symbol Parameter  
Min.  
Max.  
Min. Max.  
Min.  
Max.  
Min.  
Max.  
Unit  
24 tSREX  
Read Cycle  
25 tOH  
Self Refresh Exit Time  
2 CLK + tRC  
2 CLK + tRC  
6
Data Out Hold Time  
2.5  
2.5  
2.5  
2.5  
ns  
ns  
27 tHZ  
CAS Latency = 3  
CAS Latency = 2  
5
7
5.3  
7
5.5  
7
5.5  
7
28 tDQZ  
DQM Data Out Disable Latency  
2
2
2
2
CLK  
Write Cycle  
29 tWR  
Write Recovery Time  
CAS Latency = 3  
CAS Latency = 2  
5
10  
5.5  
10  
6
10  
7
10  
ns  
ns  
30 tDQW  
DQM Write Mask Latency  
0
0
0
0
CLK  
Notes for AC Parameters:  
1. For proper power-up see the operation section of this data sheet.  
2. AC timing tests have V = 0.8V and V = 2.0V with the timing referenced to the 1.4 V crossover point. The transition  
IL  
IH  
time is measured between V and V . All AC measurements assume t = 1ns with the AC output load circuit shown  
IH  
IL  
T
in Figure 1.  
tCK  
VIH  
VIL  
CLK  
+ 1.4 V  
t
T
tCS  
tCH  
50 Ohm  
1.4V  
COMMAND  
Z=50 Ohm  
I/O  
tAC  
tAC  
tLZ  
50 pF  
tOH  
1.4V  
OUTPUT  
tHZ  
Figure 1.  
3. If clock rising time is longer than 1 ns, a time (t /2 0.5) ns has to be added to this parameter.  
T
4. If t is longer than 1 ns, a time (t 1) ns has to be added to this parameter.  
T
T
5. These parameter account for the number of clock cycle and depend on the operating frequency of the clock, as  
follows:  
the number of clock cycle = specified value of timing period (counted in fractions as a whole number)  
6. Self Refresh Exit is a synchronous operation and begins on the 2nd positive clock edge after CKE returns high.  
Self Refresh Exit is not complete until a time period equal to tRC is satisfied once the Self Refresh Exit command  
is registered.  
V54C316162V Rev. 2.9 September 2001  
11