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V53C8258H35 参数 Datasheet PDF下载

V53C8258H35图片预览
型号: V53C8258H35
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能256K ×8 EDO页模式的CMOS动态RAM [HIGH PERFORMANCE 256K X 8 EDO PAGE MODE CMOS DYNAMIC RAM]
分类和应用:
文件页数/大小: 18 页 / 221 K
品牌: MOSEL [ MOSEL VITELIC, CORP ]
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V53C8258H  
MOSEL VITELIC  
Notes:  
1. ICC is dependent on output loading when the device output is selected. Specified ICC (max.) is measured with the  
output open.  
2.  
I
CC is dependent upon the number of address transitions. Specified ICC (max.) is measured with a maximum of two  
transitions per address cycle in EDO Page Mode.  
3. Specified VIL (min.) is steady state operating. During transitions, VIL (min.) may undershoot to –1.0 V for a period not  
to exceed 20 ns. All AC parameters are measured with VIL (min.) VSS and VIH (max.) VCC  
.
4. tRCD (max.) is specified for reference only. Operation within tRCD (max.) limits insures that tRAC (max.) and tCAA (max.)  
can be met. If tRCD is greater than the specified tRCD (max.), the access time is controlled by tCAA and tCAC  
.
5. Either tRRH or tRCH must be satisified for a Read Cycle to occur.  
6. Measured with a load equivalent to one TTL input and 50 pF.  
7. Access time is determined by the longest of tCAA, tCAC and tCAP  
.
8. AssumesthattRAD tRAD (max.). IftRAD isgreaterthantRAD (max.), tRAC willincreasebytheamountthattRAD exceeds  
t
RAD (max.).  
9. AssumesthattRCDtRCD (max.).IftRCD isgreaterthantRCD (max.),tRAC willincreasebytheamountthattRCD exceeds  
t
RCD (max.).  
10. Assumes that tRAD tRAD (max.).  
11. OperationwithinthetRAD(max.)limitensuresthattRAC (max.)canbemet. tRAD (max.)isspecifiedasareferencepoint  
only. If tRAD is greater than the specified tRAD (max.) limit, the access time is controlled by tCAA and tCAC  
.
12. tWCS, tRWD, tAWD and tCWD are not restrictive operating parameters.  
13. tWCS (min.) must be satisfied in an Early Write Cycle.  
14. tDS and tDH are referenced to the latter occurrence of CAS or WE.  
15. tT is measured between VIH (min.) and VIL (max.). AC-measurements assume tT = 3 ns .  
16. Assumes a three-state test load (5 pF and a 380 Ohm Thevenin equivalent).  
17. An initial 200 µs pause and 8 RAS-containing cycles are required when exiting an extended period of bias without  
clocks. An extended period of time without clocks is defined as one that exceeds the specified Refresh Interval.  
V53C8258H Rev. 1.4 February 1997  
8