MO SEL VITELIC
V29C51400T/V29C51400B
erase command (see Table 2). A sector must be first
erased before it can be re-written. While in the
internal erase mode, the device ignores any
program attempt into the device. The internal erase
completion can be determined via DATA polling or
toggle bit status.
Sector Erase Cycle
The V29C51400T/V29C51400B features a sector
erase operation which allows each sector to be
erased and reprogrammed without affecting data
stored in other sectors. Sector erase operation is
initiated by using a specific six-bus-cycle sequence:
Two unlock program cycles, a setup command, two
additional unlock program cycles, and the sector
The V29C51400T/V29C51400B is shipped fully
erased (all bits = 1).
Table 1. Operation Modes Decoding
Decoding Mode
Read
CE
OE
WE
A
A
A
I/O
READ
PD
0
0
0
1
1
1
9
9
9
V
V
V
V
IH
A
A
A
A
A
A
IL
IL
IH
IL
Byte Write
V
V
IH
IL
Standby
V
X
X
X
X
X
HIGH-Z
CODE
CODE
X
Autoselect Device ID
Autoselect Manufacture ID
Enabling Boot Block Protection Lock
Disabling Boot Block Protection Lock
Output Disable
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IL
IL
IL
IL
IL
IH
IH
IH
IL
IL
H
H
H
H
V
IL
V
V
V
V
X
X
H
H
IL
IL
IH
V
X
X
X
X
X
H
V
V
V
X
HIGH-Z
IL
IH
NOTES:
1. X = Don’t Care, V = HIGH, V = LOW, V = 12.5V Max.
IH
IL
H
2. PD: The data at the byte address to be programmed.
Table 2. Command Codes
Bus
Write
First Bus
Second Bus
Third Bus
Fourth Bus
Fifth Bus
Program Cycle Program Cycle
Six Bus
Program Cycle Program Cycle Program Cycle Program Cycle
Command
Sequence
Cycles
Req’d Address Data Address Data Address Data Address Data
Address Data Address Data
Reset/Read
Reset/Read
1
3
XXXXH
5555H
AAAAH
5555H
F0H
Word
Byte
AAH 2AAAH
5555H
55H 5555H
AAAAH
F0H RA
90H 01H
RD
13H, B3H
(B Device
ID)
Autoselect
Mode
Word
3
AAH 2AAAH
55H 5555H
13H, B3H
(B Device
ID)
Byte
AAAAH
5555H
AAAAH
40H
Word/Byte
00H
(Manuf. ID)
Program
Word
Byte
Word
Byte
4
0
6
5555H
AAAAH
5555H
AAAAH
5555H
AAAAH
AAH 2AAAH
5555H
55H 5555H
AAAAH
A0H PA
PD(4)
AAH
AAH
Chip Erase
AAH 2AAAH
5555H
55H 5555H
AAAAH
80H 5555H
AAAAH
2AAAH
5555H
2AAAH
5555H
55H 5555H
AAAAH
10H
30H
Sector Erase Word
Byte
AAH 2AAAH
5555H
55H 5555H
AAAAH
80H 5555H
AAAAH
55H SA
NOTES:
1. RA: Read Address
2. RD: Read Data
3. PA: The address of the memory location to be programmed.
4. PD: The data at the byte address to be programmed.
5. SA(5): Sector Address
command, two additional unlock program cycles,
and the chip erase command (see Table 2).
The automatic erase begins on the rising edge of
the last WE or CE pulse in the command sequence
and terminates when the data on DQ7 is “1”.
Chip Erase Cycle
The V29C51400T/V29C51400B features a chip-
erase operation. The chip erase operation is
initiated by using a specific six-bus-cycle
sequence: two unlock program cycles, a setup
V29C51400T/V29C51400B Rev. 1.5 October 2000
11
MOSEL [ MOSEL VITELIC, CORP ]
