MOSEL VITELIC
Functional Block Diagram
V29C51001T/V29C51001B
X-Decoder
1,048,576 Bit
Memory Cell Array
A
0
–A
16
Address buffer & latches
Y-Decoder
CE
OE
WE
Control Logic
I/O Buffer & Data Latches
I/O
0
–I/O
7
51001-05
Capacitance
(1,2)
Symbol
C
IN
C
OUT
C
IN2
Parameter
Input Capacitance
Output Capacitance
Control Pin Capacitance
Test mSetup
V
IN
= 0
V
OUT
= 0
V
IN
= 0
Typ.
6
8
8
Max.
8
12
10
Units
pF
pF
pF
NOTE:
1. Capacitance is sampled and not 100% tested.
2. T
A
= 25
°
C, V
CC
= 5V
±
10%, f = 1 MHz.
Latch Up Characteristics
(1)
Parameter
Input Voltage with Respect to GND on A
9
, OE
Input Voltage with Respect to GND on I/O, address or control pins
V
CC
Current
NOTE:
1. Includes all pins except V
CC
. Test conditions: V
CC
= 5V, one pin at a time.
Min.
-1
-1
-100
Max.
+13
V
CC
+ 1
+100
Unit
V
V
mA
AC Test Load
+5.0 V
IN3064
or Equivalent
Device Under
Test
IN3064 or Equivalent
C
L
= 100 pF
6.2 kΩ
IN3064 or Equivalent
IN3064 or Equivalent
51001-06
2.7 kΩ
V29C51001T/V29C51001B Rev. 0.8 October 2000
3