PUMA 68F16006/A-80/90/12/15
ISSUE 4.3 : November 1998
Operating Modes
The following modes are used to control the device.
OPERATION
Auto-Select Manufacturer Code
Auto Select Device Code
Read(1)
CE
L
OE
L
WE
A0
A1
A6
A9
VID
VID
A9
I /O
Code
Code
DOUT
H
L
L
L
L
L
H
H
L
L
L
L
H
A0
A1
X
A6
X
Standby
H
L
X
H
X
H
L
X
X
X
High Z
High Z
Din
Output Disable
X
X
X
Write
L
H
A0
X
A1
X
A6
X
A9
VID
VID
Enable Sector Protect
Verify Sector Protect
L
VID
L
L
X
L
H
L
H
L
Code
1) L=VIL, H=VIH, X=Don't Care
NOTE:
1) WE can be VIL if OE is VIL , OE at VIH initiates write cycle.
WRITE OPERATIONS STATUS
HARDWARE SEQUENCE FLAGS
STATUS
D7
D6
D5
D3
D2-D0
Auto-Programming
In Progress Programming in auto erase
DQ7 Toggle
0
0
0
1
0
Toggle
Toggle
(D)
Erasing in Auto Erase
0
0
1
Auto-Programming
Exceeded Programming in auto erase
DQ7
0
Toggle
Toggle
1
1
1
1
(D)
Time limits Erasing in Auto-Erase
0
Toggle
1
1
NOTE: DQ0, DQ1, DQ2, DQ4 are reserve pins for future use.
D7 Data Polling
The device features Data Polling as a method to indicate to the host system that the Embedded Algorithms
are in progress or completed.
During the Embedded Programming Algorithm, an attempt to read the device will produce complement data
of the data last written to D7. Upon completion of the Embedded Programming Algorithm an attempt to read
the device will produce the true data last written to D7. Data Polling is valid after the rising edge of the forth
WE pulse in the four write pulse sequence.
During the Embedded Erase Algorithm, D7will be "0" until the erase operation is completed. Upon completion
data at D7 is "1". For chip erase, the Data Polling is valid after the rising edge of the sixth WE pulse in the six
write pulse sequence. For sector erase, Data Polling is valid after the last rising edge of the sector erase WE
pulse.
The Data Polling feature is only active during the Embedded Programming Algorithm, Embedded Erase
Algorithm, or sector erase time-out.
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MOSAIC [ MOSAIC ]
