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PUMA2F4006-70 参数 Datasheet PDF下载

PUMA2F4006-70图片预览
型号: PUMA2F4006-70
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash Module, 512KX8, 70ns, CHIP66]
分类和应用: 内存集成电路
文件页数/大小: 24 页 / 422 K
品牌: MOSAIC [ MOSAIC ]
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PUMA 2F4006 - 70/90/12  
Issue 4.1 April 1999  
Read Mode  
The PUMA 2F4006 has two control functions which must be satisfied in order to obtain data at the outputs.  
CS1~4 is the power control and should be used for device selection  
OE is the output control and should be used to gate data to the output pins if the device is selected.  
Standby Mode  
Two standby modes are available :  
CMOS standby : CS1~4 held at Vcc +/- 0.5V  
TTL standby : CS1~4 held at VIH  
In the standby mode the outputs are in a high impedance state independent of the OE input. If the device is  
deselected during erasure or programming the device will draw active current until the operation is completed.  
Output Disable  
With the OE input at a logic high level (VIH), output from the device is disabled. This will cause the output pins  
to be in a high impedance state.  
Autoselect  
The autoselect mode allows the reading out of a binary code from the device and will identify the DIE manu-  
facturer and type. This mode is intended for use by programming equipment. This mode is functional over the  
full military temperature range. The autoselect codes are as follows :  
A16 A15  
A14 A1 A0 CODE D7 D6 D5 D4 D3 D2 D1  
D0  
(HEX)  
DIE Manufacturer code  
DIE device code  
X
X
X
X
X
X
VIL VIL 01H  
VIL VIH 20H  
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
Sector protection  
Sector Address VIH VIL 01H*  
* Outputs 01H at protected sector address. Outputs 00H at unprotected sector address.For 16 & 32 bit D0-D7 is repeated on each byte  
of the data bus.  
To activate this mode the programming equipment must force VID (11.5 to 12.5V) on address A9. Two identifier  
bytes may then be sequenced from each DIE device outputs by toggling A0 from VIL to VIH. All addresses are  
dont care apart from A1 & A0. All identifiers for manufacturer and device will exhibit odd parity with D7 defined  
as the parity bit.  
The manufacturer and device codes may also be read via the command register, for instances when the  
PUMA 2F4006 is erased or programmed in a system without access to high voltage on A9. All identifiers for  
manufacturers and device will exhibit odd parity with the MSB(D7/D15/D23/D31) defined as the parity bit. In order  
to read the proper device codes when executing the Autoselect, A1 must be VIL.  
Write  
Device erasure and programming are accomplished via the command register. The contents of the register  
serve as inputs to the internal state machine. The state machine outputs dictate the function of the device. The  
register is a latch used to store the commands along with the address and data information required to execute  
the command. The command register is written by bringing WE1~4 to VIL while CS1~4 is at VIL and  
OE is at VIH.Addresses are latched on the falling edge of WE1~4 while data is latched on the rising edge.  
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