MSM8128-70/85/10/12
Issue 4.5 : April 2001
Read Cycle Timing Waveform (1,2 )
t
RC
Address
t AA
OE
t OE
t
OH
t OLZ
t CLZ1
CS1
t ACS1 (2)
t
CHZ1 (3)
CS2
t ACS2 (2)
t CLZ2
tOHZ (3)
Data Valid
t CHZ2 (3)
Dout
Notes:
(1) WE is High for Read Cycle.
(2) Address valid prior to or coincident with CS1 transition low or CS2 high.
(3) tCHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and are not
referenced to output voltage levels. At any given temperature and voltage condition, tCHZ max is less than
tCLZ min both for a given device and from device to device. This parameter is sampled and not 100% tested.
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