MITSUBISHI MICROCOMPUTERS
4280 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
Table 7 Functions and states retained at RAM back-up
RAM BACK-UP MODE
The 4280 Group has the RAM back-up mode.
When the POF instruction is executed, system enters the RAM
back-up state.
As oscillation stops retaining RAM, the function of reset circuit
and states at RAM back-up mode, power dissipation can be
reduced without losing the contents of RAM. Table 7 shows the
function and states retained at RAM back-up. Figure 21 shows
the state transition.
Function
Program counter (PC), registers A, B,
carry flag (CY), stack pointer (SP) (Note 2)
Contents of RAM
RAM back-up
✕
O
✕ (“H” output)
✕ (“H” output)
✕ (input)
Ports D0–D6 (Note 3)
(PU02)=0 (Note 3)
Port D7
(PU02)=1
(PU00)=0 (Note 4)
✕ (input cut-off)
✕ (input)
Port E0
(1) Identification of the start condition
(PU00)=1
Warm start (return from the RAM back-up state) or cold start
(return from the normal reset state) can be identified by
examining the state of the power down flag (P) with the SNZP
instruction.
(PU01)=0 (Note 4) ✕ (input cut-off)
Port E1
(PU01)=1
✕ (input)
Port G
✕ (input)
Timer control register V1
✕
O
✕
✕
✕
✕
✕
✕
✕
(2) Warm start condition
Pull-down control register PU0
Logic operation selection register LO
Timer 1 function
When the external wakeup signal is input after the system
enters the RAM back-up state by executing the POF
instruction, the CPU starts executing the software from address
0 in page 0. In this case, the P flag is “1.”
Timer 1 underflow flag (T1F)
Watchdog timer (WDT)
(3) Cold start condition
Watchdog timer flag 1 (WDF1)
Watchdog timer flag 2 (WDF2)
Most significant ROM code reference enable flag (URS)
The CPU starts executing the software from address 0 in page
0 when any of the following conditions is satisfied .
• reset by power-on reset circuit is performed
• reset by watchdog timer is performed
• reset by voltage drop detection circuit is performed
In this case, the P flag is “0.”
Notes 1: “O” represents that the function can be retained, and
“✕” represents that the function is initialized.
Registers and flags other than the above are undefined
at RAM back-up, and set an initial value after returning.
2:The stack pointer (SP) points the level of the stack
register and is initialized to “112” at RAM back-up.
3: The contents of port output latch is initialized to “0.”
However, port continues to output “H” level.
4: The state of this bit is equal to the state at reset.
MITSUBISHI
ELECTRIC
18
MITSUBISHI [ Mitsubishi Group ]
