MITSUBISHI MICROCOMPUTERS
4280 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
(1) Internal state at reset
The contents of timers, registers, flags and RAM except shown
in Figure 19 are undefined, so set the initial value to them.
Table 6 shows port state at reset, and Figure 19 shows internal
state at reset (they are retained after system is released from
reset).
• Program counter (PC) .............................................................. 0
Address 0 in page 0 is set to program counter.
0
0
0
0
0
0
0
0
0
• Power down flag (P) ................................................................. 0
• Timer 1 underflow flag (T1F) ................................................... 0
• Timer control register V1..........................................................
0
0
1
0
0
0
1
0
• Carrier wave selection register C ............................................ 1
• Pull-down control register PU0 ................................................ 0
• Logic operation selection register LO ...................................... 0
• Most significant ROM code reference enable flag (URS)
• Carry flag (CY) .........................................................................
0
0
• Register A ................................................................................. 1
• Register B ................................................................................. 1
• Stack pointer (SP) .................................................................... 1
1
1
1
1
1
1
1
Fig. 19 Internal state at reset
Table 6 Port state at reset
State at reset
Name
State after system is released from reset
“H” output
“H” output
High impedance state
D0–D6
D7
Input circuit OFF (Pull-down transistor OFF)
Input port (Pull-down transistor ON)
Input port (Pull-down transistor ON)
G0–G3, E2
E0, E1
Input circuit OFF (Pull-down transistor OFF) Input port (Pull-down transistor OFF)
Note: The contents of all output latch is initialized to “0.”
The voltage drop detection circuit is stopped and power
dissipation is reduced at the RAM back-up mode, when the
functions except the RAM and pull-down control register (PU0)
are initialized.
VOLTAGE DROP DETECTION CIRCUIT
The built-in drop detection circuit is designed to detect a drop in
voltage at operating and to reset the microcomputer if the supply
voltage drops below the specified value (Typ. 1.50 V) or less.
VDD
Reset voltage
Microcomputer starts operation
after f(XIN) is counted to 16384 times.
Internal reset signal
Fig. 20 Voltage drop detection circuit operation waveform
MITSUBISHI
ELECTRIC
17
MITSUBISHI [ Mitsubishi Group ]
