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PDSP16510AMAGCPR 参数 Datasheet PDF下载

PDSP16510AMAGCPR图片预览
型号: PDSP16510AMAGCPR
PDF下载: 下载PDF文件 查看货源
内容描述: 单机FFT处理器 [Stand Alone FFT Processor]
分类和应用: 外围集成电路时钟
文件页数/大小: 23 页 / 97 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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PDSP16510A MA  
inputs. Whendataisfromasinglesource, andnooverlapsare  
needed, only the real input should be used. If 50% or 75%  
overlaps are needed from a single source of real data, the  
devicealwaysexpectsblockstobesimultaneouslyloaded.An  
external FIFO is then needed to supply data to the real inputs  
after a delay of one block. Each block is thus loaded twice,  
firstly through the Auxiliary inputs and then through the Real  
inputs.  
than 1024 points are to be performed simultaneously. It  
changes the LFLG logic and allows sampling rates up to the  
system clock rate to be achieved with multiple output proces-  
sors.  
BIT 11  
WhenthisbitissetthePDSP16510willnotgenerateDAV  
until 24 DOS clocks after data was actually valid. In this case  
the output tri-state drivers will be enabled at the correct time,  
even though the DAV signal was not externally valid. Host  
controlled dumping should not be used.  
BIT 10:9  
These bits define a single device system, or one of three  
multiple device possibilities. The choice between the first and  
second multiple device mode is dependent on the transform  
size and the sampling rate needed. The third mode should  
only be used when overlapped multiple transforms with less  
BIT 12  
When this bit is set in the single device mode, the INEN  
input is a simple load enable signal. When it is reset an INEN  
edge is needed at the end of a load sequence before a new  
one can commence.  
When it is reset in a multiple device mode it has no  
action, but when it is set it will cause the DEF high going edge  
to also initiate a load operation.  
BITS  
2:0  
Dec'  
OPTION  
000  
001  
010  
011  
100  
101  
110  
111  
16 x 16 COMPLEX  
4 x 64 COMPLEX  
256 COMPLEX  
1024 COMPLEX  
8 X 64 REAL  
2 X 256 REAL  
2 X 1024 REAL  
NOT USED  
BIT 14:13  
These bits allow four dump size options to be provided.  
Individual frequency bins are not accessible.  
BIT 15  
Under normal circumstances DAV would be expected to  
go invalid when a transform has been dumped. In some  
applications,however,itmaybenecessarytoreadtheoutputs  
morethanonce. Whenthisbitisset, DAVwillremainvaliduntil  
thenextINENinput,andwillindicatethatthetransformeddata  
still remains in the internal buffer. As soon as the next INEN is  
received the transformed data will be overwritten. Whilst DAV  
remains active the output tri-states will be enabled.  
3
0
1
SHIFT 3 PLACES AFTER PASS1  
ALWAYS SHIFT 2 PLACES  
5:4  
00  
01  
10  
11  
RECTANGULAR  
HAMMING WINDOW  
BLACKMAN-HARRIS  
INVERSE TRANSFORM  
8:6  
000  
001  
010  
011  
100  
101  
110  
111  
NO OVERLAP  
50% OVERLAP  
50% OVERLAP AND DIS ÷ 2  
75% OVERLAP  
75% OVERLAP AND DIS ÷ 4  
DUAL SOURCE, NO OVERLAP  
DUAL SOURCE, 50% OVERLAP  
DUAL SOURCE, 75% OVERLAP  
WINDOW OPERATORS  
Since only a finite segment of a signal can be observed and  
processed at any one time, it is impossible to obtain pure  
spectral lines. Discontinuities are introduced at the bounda-  
ries of the observation interval which lead to spectral leakage.  
Windows are weighting functions applied to the data in order  
to reduce these discontinuities at the boundaries.  
In the time domain the signal has to be observed through  
a finite window as a matter of accord. This is in fact equivalent  
to multiplying the signal with a set of uniform weights i.e. a  
rectangular window operator. In the frequency domain the  
spectrum of the data will be the spectrum of this weighting  
function shifted to the sinusoidal frequencies of the compo-  
nents in the data.  
TherectangularwindowhasaFourierTransformwhichis  
a SINC(X) function. This has sidelobes which are only 13dB  
down from the main lobe. This severely limits the dynamic  
rangeofthesystemsinceasecondsinusoidincloseproximity  
would have its main lobe swamped by this side lobe. This  
would occur if its amplitude was a mere 13dB down from the  
first sinusoid.  
10:9  
00  
01  
10  
11  
SINGLE DEVICE  
N DEVICES, CONCURRENT I/O  
N DEVICES, LOAD-TRANS-DUMP  
SPECIAL MULTIPLE TRANSFORM  
11  
12  
00  
01  
DAV NOT DELAYED  
24 CLK DAV DELAY  
0
1
INEN EDGE ACTIVATED  
INEN IS SIMPLE ENABLE  
14:13 00  
O/P FIRST QUARTER  
O/P FIRST HALF  
O/P LAST HALF  
01  
10  
11  
Window operators are thus mathematically constructed  
tocancelthesesidelobesasfaraspossible.Unfortunatelythis  
is normally done at the expense of making the main lobe  
spread over more frequency bins. This reduces the ability of  
the system to resolve two frequencies, and can only be  
O/P ALL RESULTS  
15  
0
1
NORMAL DAV  
KEEP DAV ACTIVE TILL INEN  
Table 6. Mode Control Bit Allocations  
17