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PDSP16488GC 参数 Datasheet PDF下载

PDSP16488GC图片预览
型号: PDSP16488GC
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片的二维卷积器与积分行延迟 [Single Chip 2D Convolver with Integral Line Delays]
分类和应用:
文件页数/大小: 33 页 / 414 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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Switching Characteristics for Host mode  
Value  
Characteristic  
Symbol  
Units  
Conditions  
Min. Max.  
tDSH  
tHSU  
tRA  
hold time after  
low  
20  
0
5
10  
30  
50  
0
0
0
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Only applicable for Read ops and if  
is used  
REPLY  
DS  
REPLY  
Host address/data setup time  
Read setup time to prevent Write  
Host signal hold time  
Only applicable if  
is used (Note 1)  
REPLY  
tHH  
Must always be guaranteed  
No clocks are needed in  
tDEL  
tEXP  
tCSU  
tCH  
tPSU  
tPH  
tPCH  
tACC  
tRSU  
Expansion in to data out in  
mode  
mode  
PROG  
low (Note 2)  
PROG  
Delay from  
low to  
PC1  
Greater than tDEL under all conditions  
DS  
setup time  
hold time  
CE  
CE  
setup time  
hold time  
PROG  
PROG  
high delay after  
high  
50  
50  
5
Defines  
high time  
DS  
DS  
PC1  
Coefficient read time  
From Master or Single device  
REPLY  
Coefficients valid time before  
NOTES  
1. If REPLY is not used, time is referenced to the rising edge of DS and when set up must be N3 DEL  
t
for N devices.  
2. Equivalent to PC0 to PC1 delay  
DATUM  
tWAIT > tPCH  
DS  
CE  
tCSU  
tCH  
tPSU  
tPH  
PROG  
tACC  
COEFFICIENT OUTPUT, X7:0  
tEXP  
tRSU  
tPCH  
PC1 FROM MASTER OR SINGLE DEVICE  
tDSH  
PC1 FROM LAST DEVICE (REPLY)  
R/W FROM HOST  
tRA  
tHH  
tHSU  
VALID  
ADDRESS/DATA FROM HOST  
tDEL  
HOST DATA OUTPUT FROM FIRST DEVICE  
VALID  
Fig. 10 Host timing  
18  
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