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PDSP16116MCGGDR 参数 Datasheet PDF下载

PDSP16116MCGGDR图片预览
型号: PDSP16116MCGGDR
PDF下载: 下载PDF文件 查看货源
内容描述: 16 x 16位乘法器复 [16 X 16 Bit Complex Multiplier]
分类和应用: 外围集成电路
文件页数/大小: 17 页 / 272 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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PDSP16116  
ELECTRICAL CHARACTERISTICS  
The Electrical Characteristics are guaranteed over the following range of operating conditions, unless otherwise stated:  
VDD = 15V 10%, GND = 0V, TAMB (Industrial) = 240°C to 185°C, TAMB (Military) = 255°C to 1125°C  
Static Characteristics  
Value  
Units  
Min. Typ. Max.  
Characteristic  
Symbol  
Conditions  
VOH  
VOL  
VIH  
VIH  
VIL  
IIN  
CIN  
IOZ  
IOS  
Output high voltage  
Output low voltage  
Input high voltage  
Input high voltage  
Input low voltage  
Input leakage current  
Input capacitance  
Output leakage current  
Output short circuit current  
2·4  
-
3·0  
2·2  
-
-
0·4  
-
V
V
V
V
V
µA  
pF  
µA  
mA  
IOH = 8mA  
OL = 28mA  
CLK input only  
All other inputs  
GND < VIN < VDD  
I
-
0·8  
110  
210  
10  
GND < VOUT < VDD  
VDD = 15·5V  
250  
10  
150  
300  
Switching Characteristics  
PDSP16116  
PDSP16116A  
PDSP16116D  
Characteristic  
Symbol  
Units Conditions  
Fig.  
Min. Max. Min.  
Min.  
Max.  
Max.  
tCP  
tCW  
tCG  
tCSFTA  
tCSFTR  
tCES  
tCEH  
tDS  
tDH  
tWS  
tWH  
tCONS  
tCONH  
tAS  
tAH  
tOP  
tOPHZ  
tOPLZ  
tOPZH  
tOPZL  
fCLK  
tCLK  
tCLKH  
tCLKL  
IDDC  
IDDT  
5
5
5
5
5
11  
-
11  
-
14  
-
14  
-
14  
-
-
-
45  
30  
30  
60  
50  
-
0
-
2
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
MHz  
ns  
ns  
ns  
30pF  
30pF  
30pF  
30pF  
30pF  
5
5
5
5
5
8
-
8
-
8
-
8
-
8
-
-
-
23  
20  
20  
30  
28  
-
0
-
0
-
5
5
5
5
5
8
-
8
-
8
-
8
-
8
-
-
-
23  
20  
20  
30  
28  
-
0
-
2
-
9
P ports setup time  
WTOUT1:0 setup time  
GWR4:0 setup time  
SFTA1:0 setup time  
SFTR2:0 setup time  
9
9
9
9
9
9
9
9
9
CEX  
CEX  
CEY  
CEY  
or  
or  
setup time  
hold time  
X or Y ports setup time  
X or Y ports hold time  
SOBFP or EOPSS  
WTA, WTB,  
WTA, WTB,  
setup time  
hold time  
0
-
0
-
0
-
0
-
0
-
0
-
SOBFP or EOPSS  
CONX or CONY setup time  
CONX or CONY hold time  
AR15:13 or AI15:13 setup time  
AR15:13 or AI15:13 hold time  
OSEL to valid P ports  
0
0
2
35  
35  
45  
22  
24  
10  
-
20  
25  
25  
18  
18  
20  
-
20  
25  
25  
18  
18  
31·5  
-
30pF  
10, 11  
10, 11  
10, 11  
10, 11  
OER or OEI  
OER or OEI  
OER or OEI  
OER or OEI  
high to PR or PI high to high Z  
low to PR or PI low to high Z  
low to PR or PI high Z to high  
high to PR or PI high Z to low  
-
-
-
-
-
-
-
-
-
CLK frequency  
CLK period  
CLK high time  
CLK low time  
100  
30  
20  
-
50  
12  
12  
-
31·7  
12  
12  
-
9
9
9
-
-
-
-
-
-
60  
100  
mA See Note 1  
See Note 1  
80  
130  
80  
130  
V
V
DD current (CMOS input levels)  
DD current (TTL input levels)  
-
-
-
NOTES  
1. VDD = 15·5V, outputs unloaded, clock frequency = Max.  
2. The PDSP16116B is specified as the PDSP16116A except that the maximum clock frequency is guaranteed at 25MHz, with a minimum  
clock period of 40ns.  
13